SRAM Chip Async Dual 5V 1M-Bit 1M x 1 10ns 28-Pin SOJ

The CY7C107D is high-performance CMOS static RAMs organized as 1,048,576 words by 1 bit. Easy memory expansion is provided by an active LOW Chip Enable (CE) and tri-state drivers. These devices have an automatic power-down feature that reduces power consumption by more than 65% when deselected.

• Pin- and function-compatible with CY7C107B/CY7C1007B
• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 80 mA @ 10 ns
• Low complementary metal oxide semiconductor (CMOS) standby power
  • ISB2 = 3 mA
• 2.0 V data retention
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Transistor transistor logic (TTL) compatible inputs and outputs
• CY7C107D available in Pb-free 28-pin 400-Mil wide Molded SOJ package. CY7C1007D available in Pb-free 28-pin 300-Mil wide Molded SOJ package