SRAM Chip Async Single 3.3V 4M-Bit 256K x 16 10ns 44-Pin TSOP-II
The CY7C1041DV33 is a high performance CMOS Static RAM organized as 256 K words by 16-bits. To write to the device, take chip enable (CE) and write enable (WE) inputs LOW. If byte low enable (BLE) is LOW, then data from I/O pins is written into the location specified on the address pins. If byte high enable (BHE) is LOW, then data from I/O pins is written into the location specified on the address pins.
- Temperature ranges
- Industrial: -40 °C to 85 °C
- Pin and function compatible with CY7C1041CV33
- High speed
- tAA = 10 ns
- Low active power
- ICC = 90 mA
- Low CMOS standby power
- ISB2 = 10 mA
- 2.0 V data retention
- Automatic power-down when deselected
- TTL compatible inputs and outputs
- Easy memory expansion with CE and OE features
- Available in Pb-free 48-ball VFBGA, 44-pin (400-mil) molded SOJ, and 44-pin TSOP II Packages
Especificações
| Brand | Rochester Electronics |
|---|---|
| Datasheet | |
| Timing Type | Asynchronous |
| Number Of Words | 256 kWords |
| Density | 4 Mb |
| Operating temperature | -40 to 85 °C |
| Pin Count | 44 |
| Number Of Ports | 1 |
| Mounting | Surface Mount |
| Address B | 18 Bit |
| Number Of | 16 Bit |
| Number Of | 16 Bit |
| Maximum O | 90 mA |
| Product description | 18.52 x 10.26 x 1.04 mm |
| Maximum R | 10 ns |
| Supplier | TSOP-II |
| Typical O | 3.3000 V |
| ECCN | 3A991.B.2.B |
| Schedule B | 8541290080 |
| HTSN | 8541290075 |
| Country of origin | United States |
| Screening Level | Industrial |
| Minimum O | 3 V |
| Maximum O | 3.6 V |
| Lead Finish | Matte Tin|Gold |
| Max Proce | 260 |
| Msl Level | 3 |
SKU: CY7C1041DV33-10ZSXI