SRAM Chip Async Single 3.3V 16M-Bit 2M x 8 10ns 48-Pin VFBGA Tray

The CY7C1069DV33 is a high performance CMOS Static RAM organized as 2,097,152 words by 8 bits. To write to the device, take Chip Enables and Write Enable input LOW. Data on the eight I/O pins is then written into the location specified on the address pins . To read from the device, take Chip Enables and Output Enable LOW while forcing the Write Enable HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins. The input and output pins are placed in a high impedance state when the device is deselected, the outputs are disabled, or during a write operation. The CY7C1069DV33 is available in a 54-pin TSOP II package with center power and ground (revolutionary) pinout, and a 48-ball very fine-pitch ball grid array (VFBGA) package.

• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 175 mA at 100 MHz
• Low complementary metal oxide semiconductor (CMOS) standby power
  • ISB2 = 25 mA
• Operating voltages of 3.3 ± 0.3 V
• 2.0 V data retention
• Automatic power-down when deselected
• Transistor-transistor logic (TTL) compatible inputs and outputs
• Easy memory expansion with CE1 and CE2 features
• Available in Pb-free 54-pin thin small outline package (TSOP) Type II and 48-ball very fine-pitch ball grid array (VFBGA) packages.