SRAM Chip Async Single 5V 1M-Bit 128K x 8 45ns 32-Pin TSOP-I

The IS65C1024 is a low power, 131,072-word by 8-bit CMOS static RAM. It is fabricated using high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices. When CE1\ is HIGH or CE2 is LOW (deselected), the device assumes a standby mode at which the power dpation can be reduced by using CMOS input levels. Easy memory expansion is provided by using two Chip Enable inputs, CE1\ and CE2.The active LOW Write Enable (WE/) controls both writing and reading of the memory.

• High-speed access time: 35, 45 ns
• Low active power: 100 mW (typical)
• Low standby power: 20 µW (typical) CMOS standby
• Output Enable (OE) and two Chip Enable (CE1 and CE2) inputs for ease in applications
• Fully static operation: no Clock or refresh required
• TTL compatible inputs and outputs
• Single 5V (±10%) power supply
• Commercial, Industrial, and Automotive temperature ranges available
• Standard Pin Configuration: 32-pin SOP/ 32-pin TSOP (Type 1)
• Lead free available