SRAM Chip Async Dual 5V 8K-Bit 1K x 8 25ns 52-Pin PLCC T/R

CY7C131 is high-speed, low-power CMOS 1 K / 2 K × 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in memory. The CY7C131E / CY7C131AE / CY7C136E / CY7C136AE can be used as a standalone dual-port static RAM. It is the solution to applications requiring shared or buffered data, such as cache memory for DSP, bit-slice, or multiprocessor designs.

• True dual-ported memory cells, which allow simultaneous reads of the same memory location
• 1 K / 2 K × 8 organization
• 0.35 micron complementary metal oxide semiconductor (CMOS) for optimum speed and power
• High speed access: 15 ns
• Low operating power: ICC = 110 mA (typical), Standby: ISB3 = 0.05 mA (typical)
• Fully asynchronous operation
• Automatic power-down
• BUSY output flag to indicate access to the same location by both ports
• INT/ flag for port-to-port communication
• Available in 52-pin plastic leaded chip carrier (PLCC), 52-pin plastic quad flat package (PQFP)
• Pb-free packages available