SRAM Chip Async Single 3.3V 4M-Bit 256K x 16 8ns 48-Pin TFBGA T/R

The ISSI IS61WV25616EDBLL is a high-speed,4,194,304-bit static RAMs organized as 262,144 wordsby 16 bits. It is fabricated using ISSI"s high-performanceCMOS technology. This highly reliable process coupledwith innovative circuit design techniques, yields highperformanceand low power consumption devices. When CE is HIGH (deselected), the device assumes astandby mode at which the power dissipation can be reduceddown with CMOS input levels. Easy memory expansion is provided by using Chip Enableand Output Enable inputs, CE and OE. The active LOWWrite Enable (WE) controls both writing and reading of thememory. A data byte allows Upper Byte (UB) and LowerByte (LB) access. The IS61WV25616EDBLL is packaged in the JEDECstandard 44-pin TSOP-II and 48-pin Mini BGA (6mm x8mm).

• High-speed access time: 8, 10 ns
• Low Active Power: 85 mW (typical)
• Low Standby Power: 7 mW (typical) CMOS standby
• Single power supply
  • Vdd 2.4V to 3.6V (10 ns)
  • Vdd 3.3V ± 10% (8 ns)
• Fully static operation: no clock or refresh required
• Three state outputs
• Data control for upper and lower bytes
• Industrial and Automotive temperature support
• Lead-free available
• Error Detection and Error Correction