SRAM Chip Async Single 3.3V 256K-Bit 32K x 8 45ns 28-Pin TSOP-I

The IS65LV256 is a very high-speed, low power, 32,768-wordby8-bit static RAM. It is fabricated high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 15 ns maximum. When CE\ is HIGH (deselected), the device assumes a standby mode at which the power dpation is reduced to 150 µW (typical) with CMOS input levels. Easy memory expansion is provided by using an active LOW Chip Enable (CE\). The active LOW Write Enable (WE\) controls both writing and reading of the memory. The IS65LV256 is available in the JEDEC standard 28-pin SOJ, 28-pin SOP, and the 28-pin TSOP (Type I) package.

• High-speed access time: 20, 45 ns
• Automatic power-down when chip is deselected
• CMOS low power operation
  • 17 µW (typical) CMOS standby
  • 50 mW (typical) operating
• TTL compatible interface levels
• Single 3.3V power supply
• Fully static operation: no clock or refreshrequired
• Three-state outputs
• Industrial and Automotive temperatures available
• Lead-free available