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NOR Flash Parallel/Serial 1.8V 64Mbit 4M x 16bit 70ns 56-Pin VFBGA T/R

The M58WR064KT is a 64 Mbit (4 Mbit x 16) non-volatile flash memory. They may be erased electrically at block level and programmed in-system on a word-byword basis using a 1.7 V to 2 V VDD supply for the circuitry and a 1.7 V to 2 V VDDQ supply for the Input/output pins. An optional 9 V VPP power supply is provided to speed up customer programming.The M58WR064KT feature an asymmetrical block architecture.The M58WR064KT has an array of 135 blocks, and is divided into 4 Mbit banks. There are 15 banks each containing 8 main blocks of 32 Kwords, and one parameter bank containing 8 parameter blocks of 4 Kwords and 7 main blocks of 32 Kwords.The multiple bank architecture allows dual operations.While programming or erasing in one bank, read operations are possible in other banks. Only one bank at a time is allowed to be in program or erase mode. It is possible to perform burst reads that cross bank boundaries. The parameter blocks are located at the top of the memory address space for M58WR064KT.Each block can be erased separately. Erase can be suspended to perform program in any other block, and then resumed. Program can be suspended to read data in any other block and then resumed. Each block can be programmed and erased over 100000 cycles using the supply voltage VDD. Two enhanced factory programming commands are available to speed up programming.Program and erase commands are written to the command interface of the memory. An internal Program/Erase Controller manages the timings necessary for program and erase operations.The end of a program or erase operation can be detected and any error conditions identified in the Status Register. The command set required to control the memory is consistent with JEDEC standards.The device supports synchronous burst read and asynchronous read from all blocks of the memory array; at power-up the device is configured for asynchronous read. In synchronous burst mode, data is output on each clock cycle at frequencies of up to 66 MHz. The synchronous burst read operation can be suspended and resumed.The device features an automatic standby mode. When the bus is inactive during asynchronous read operations, the device automatically switches to the automatic standby mode. In this condition the power consumption is reduced to the standby value IDD4 and the outputs are still driven.The M58WR064KT feature an instant, individual block locking scheme that allows any block to be locked or unlocked with no latency, enabling instant code and data protection. All blocks have three levels of protection. They can be locked and locked-down individually preventing any accidental programming or erasure. There is additional hardware protection against program and erase. When VPP =VPPLK all blocks are protected against program or erase. All blocks are locked at power-up.The device includes a Protection Register to increase the protection of a system"s design. The Protection Register is divided into two segments: a 64-bit segment containing a unique device number written by Numonyx, and a 128-bit segment one-time-programmable (OTP) by the user. The user programmable segment can be permanently protected.
  • Supply voltage
    • VDD = 1.7 V to 2 V for program, erase and read
    • VDDQ = 1.7 V to 2 V for I/O buffers
    • VPP = 9 V for fast program
  • Synchronous/asynchronous read
    • Synchronous burst read mode: 66 MHz
    • Asynchronous/synchronous page read mode
    • Random access times: 70 ns
  • Synchronous burst read suspend
  • Programming time
    • 10 µs by word typical for fast factory program
    • Double/quadruple word program option
    • Enhanced factory program options
  • Memory blocks
    • Multiple bank memory array: 4 Mbit banks
    • Parameter blocks (top or bottom location)
  • Dual operations
    • Program erase in one bank while read in others
    • No delay between read and write operations
  • Block locking
    • All blocks locked at power-up
    • Any combination of blocks can be locked
    • WP for block lock-down
  • Security
    • 128-bit user programmable OTP cells
    • 64-bit unique device number
  • Common Flash interface (CFI)
  • 100 000 program/erase cycles per block
  • Electronic signature
    • Manufacturer code: 20h
    • Device codes:
    • M58WR016KT (top): 8812h
    • M58WR016KB (bottom): 8813h
    • M58WR032KT (top): 8814h
    • M58WR032KB (bottom): 8815h
    • M58WR064KT (top): 8810h
    • M58WR064KB (bottom): 8811h
  • ECOPACK® package available

仕様

Brand Micron
Maximum P 0.1/Word ms
Ecc Support Yes
Simultane No
Program Current 40 mA
Boot Block Yes
Block Org Asymmetrical
Erase Sus Yes
Interface Type Parallel|Serial
Programmi 8.5, 9.5 V
Density 64 Mb
Maximum R 70 ns
Maximum O 30 mA
Architecture Sectored
Typical O 1.8000 V
Product description 9 x 7.7 x 0.66 mm
Timing Type Asynchronous|Synchronous
Operating temperature -40 to 85 °C
Address B 22 Bit
Maximum E 4/Main Block s
Schedule B 8542320050
HTSN 8542320051
Number Of Words 4 MWords
Number Of 16 Bit
Minimum O 1.7 V
Supplier VFBGA
Maximum O 2 V
Cell Type NOR
Oe Access Time 20 ns
Location Top
Bank Size 4/4/4/4/4/4/4/4/4/4/4/4/4/4/4/4 Mb
Maximum P 20 ns
Page Read 27 mA
SKU: M58WR064KT7AZB6F