Bus Exchange Switch 1-Element 12-CH 56-Pin TSSOP T/R

The SN74CB3T16212 is a high-speed TTL-compatible FET bus-exchange switch, with low ON-state resistance (ron), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks VCC. The SN74CB3T16212 supports systems using 5-V TTL, 3.3-V LVTTL, and 2.5-V CMOS switching standards, as well as user-defined switching levels (see Figure 1). The SN74CB3T16212 operates as a 24-bit bus switch or as a 12-bit bus exchange that provides data exchanging between four signal ports. The select (S0, S1, S2) inputs control the data path of the bus-exchange switch. When the bus-exchange switch is ON, the A port is connected to the B port, allowing bidirectional data flow between ports. When the bus-exchange switch is OFF, a high-impedance state exists between the A and B ports. This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off. To ensure the high-impedance state during power up or power down, each select input should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Member of the Texas Instruments Widebus™ Family

Output Voltage Translation Tracks V_CC

Supports Mixed-Mode Signal Operation on All Data I/O Ports

• 5-V Input Down to 3.3-V Output Level Shift With 3.3-V V_CC
• 5-V/3.3-V Input Down to 2.5-V Output Level Shift With 2.5-V V_CC

5-V-Tolerant I/Os With Device Powered Up or Powered Down

Bidirectional Data Flow, With Near-Zero Propagation Delay

Low ON-State Resistance (r_on) Characteristics (r_on = 5 O Typ)

Low Input/Output Capacitance Minimizes Loading (C_io(OFF) = 9 pF Typ)

Data and Control Inputs Provide Undershoot Clamp Diodes

Low Power Consumption (I_CC = 70 µA Max)

V_CC Operating Range From 2.3 V to 3.6 V

Data I/Os Support 0- to 5-V Signaling Levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)

Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs

I_off Supports Partial-Power-Down Mode Operation

Latch-Up Performance Exceeds 250 mA Per JESD 17

ESD Performance Tested Per JESD 22

• 2000-V Human-Body Model (A114-B, Class II)
• 1000-V Charged-Device Model (C101)

Supports Digital Applications: Level Translation, PCI Interface, USB Interface, Memory Interleaving, and Bus Isolation

Ideal for Low-Power Portable Equipment