MCU 32-Bit TMPM3 ARM Cortex M3 RISC 512KB Flash 3.3V 100-Pin LQFP
The TMPM333 is a 32-bit RISC microprocessor series with an ARM Cortex-M3 microprocessor core.
- ARM Cortex-M3 microprocessor core
- Improved code efficiency has been realized through the use of Thumb® -2 instruction
- New 16-bit Thumb instructions for improved program flow
- New 32-bit Thumb instructions for improved performance
- New Thumb mixed 16-/32-bit instruction set can produce faster, more efficient code
- Both high performance and low power consumption have been achieved.[High performance]
- A 32-bit multiplication (32×32=32 bit) can be executed with one clock
- Division takes between 2 and 12 cycles depending on dividend and devisor[Low power consumption]
- Optimized design using a low power consumption library
- Standby function that stops the operation of the micro controller core
- High-speed interrupt response suitable for real-time control
- An interruptible long instruction
- Stack push automatically handled by hardware.
- 16-bit timer (TMRB): 10 channels
- 16-bit interval timer mode
- 16-bit event counter mode
- 16-bit PPG output
- Input capture function
- Real time clock (RTC): 1 channel
- Clock (hour, minute and second)
- Calendar (month, week, date and leap year)
- Time correction + or - 30seconds (by software)
- Alarm (Alarm output)
- Alarm interrupt
- Watchdog timer (WDT): 1 channelWatchdog timer (WDT) generates a reset or a non-maskable interrupt (NMI).
- General-purpose serial interface (SIO/UART): 3 channelsEither UART mode or synchronous mode can be selected (4byte FIFO equipped)
- Serial bus interface (I²C/SIO): 3channels
- Either I²C bus mode or synchronous mode can be selected.
- 10-bit AD converter (ADC): 12 channels
- Start by an internal timer trigger
- Fixed channel/scan mode
- Single/repeat mode
- AD monitoring 2ch
- Conversion speed 1.15µsec. (@fsys = 40MHz)
- Interrupt source
- Internal: 38 factors..The order of precedence can be set over 7 levels (except the watchdog timer interrupt)
- External: 8 factors..The order of precedence can be set over 7 levels.
- Non-maskable interrupt (NMI)
- Non-maskable interrupt (NMI) is generated by a watchdog timer or a NMI pin.
- Input/ output ports (PORT): 78 pins
- Standby mode
- Standby modes: IDLE, SLOW, SLEEP, STOP
- Sub clock operation(32.768kHz): SLOW, SLEEP
Specifications
| Brand | Toshiba |
|---|---|
| Interface Type | I2C/SIO/UART |
| Maximum O | 3.6 V |
| Operating | 3.3000 V |
| Supplier | LQFP |
| Number Of | 10 |
| Program M | 512 Kb |
| Data Bus Width | 32 Bit |
| Screening Level | Industrial |
| Max Proce | 260 °C |
| Maximum P | 600 mW |
| On Chip Adc | 12-chx10-bit |
| Operating temperature | -20 to 85 °C |
| Minimum O | 2.7 V |
| Watchdog | 1 |
| Instructi | RISC |
| Program M | Flash |
| Product description | 14 x 14 x 1.4 mm |
| Maximum Speed | 40 MHz |
| Device Core | ARM Cortex M3 |
| Number Of | 78 |
| Ram Size | 32 KB |
| Schedule B | 8542310000 |
| HTSN | 8542310001 |
SKU: TMPM333FDFG(CJ)