FIFO Mem Async Dual Bi-Dir 1K x 9 x 2 44-Pin PLCC Tube

A FIFO memory is a storage device that allows data to be written into and read from its array at independent data rates. The SN74ACT2235 is arranged as two 1024 × 9-bit FIFOs for high speed and fast access times. It processes data at rates up to 50 MHz, with access times of 25 ns in a bit-parallel format. The SN74ACT2235 consists of bus-transceiver circuits, two 1024 × 9-bit FIFOs, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal FIFO memories. Enable (GAB and GBA) inputs are provided to control the transceiver functions. The select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. Figure 2 shows the eight fundamental bus-management functions that can be performed with the SN74ACT2235.

Independent Asynchronous Inputs and Outputs

Low-Power Advanced CMOS Technology

Bidirectional

Dual 1024 by 9 Bits

Programmable Almost-Full/Almost-Empty Flag

Empty, Full, and Half-Full Flags

Access Times of 25 ns With a 50-pF Load

Data Rates up to 50 MHz

Fall-Through Times of 22 ns Maximum

High Output Drive for Direct Bus Interface

Package Options Include 44-Pin Plastic Leaded Chip Carriers (FN) and 64-Pin Thin Quad Flat (PAG, PM) Packages