SRAM Chip Async Single 3.3V 512K-Bit 32K x 16 15ns 44-Pin TSOP-II
The CY7C1020CV33 is a high-performance CMOS static RAM organized as 32,768 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking Chip Enable and Write Enable inputs LOW. If Byte Low Enable is LOW, then data from I/O pins, is written into the location specified on the address pins. If Byte High Enable is LOW, then data from I/O pins is written into the location specified on the address pins.
- Pin- and function-compatible with CY7C1020CV33
- Temperature Ranges
- Commercial: 0 °C to 70 °C
- Industrial: -40 °C to 85 °C
- Automotive: -40 °C to 125 °C
- High speed
- tAA = 10 ns
- CMOS for optimum speed/power
- Low active power
- 325 mW (max)
- Automatic power-down when deselected
- Independent control of upper and lower bits
- Available in Pb-free and non Pb-free 44-pin TSOP II package
Caractéristiques
| Brand | Rochester Electronics |
|---|---|
| Datasheet | |
| Timing Type | Asynchronous |
| Number Of Words | 32 kWords |
| Density | 512 Kb |
| Operating temperature | 0 to 70 °C |
| Pin Count | 44 |
| Number Of Ports | 1 |
| Mounting | Surface Mount |
| Address B | 15 Bit |
| Number Of | 16 Bit |
| Number Of | 16 Bit |
| Maximum O | 80 mA |
| Product description | 18.52 x 10.26 x 1.04 mm |
| Maximum R | 15 ns |
| Supplier | TSOP-II |
| Typical O | 3.3000 V |
| ECCN | 3A991.B.2.B |
| Schedule B | 8542320040 |
| HTSN | 8542320041 |
| Country of origin | United States |
| Screening Level | Commercial |
| Minimum O | 2.97 V |
| Maximum O | 3.63 V |
| Lead Finish | Tin/Lead |
| Max Proce | 235 |
| Msl Level | 3 |
SKU: CY7C1020CV33-15ZC