DDR/DDR2/DDR3/DDR3L/LPDDR3/DDR4 Termination Regulator 3A 4.75V to 5.25V 24-Pin VQFN T/R

The TPS51116 provides a complete power supply for DDR/SSTL-2, DDR2/SSTL-18,DDR3/SSTL-15, and LPDDR3 memory systems. It integrates a synchronous buckcontroller with a 3-A sink/source tracking linear regulator and buffered lownoise reference. The TPS51116 offers the lowest total solution cost in systemswhere space is at a premium. The TPS51116 synchronous controller runs fixed400-kHz, pseudo-constant frequency PWM with an adaptive on-time control that canbe configured in D-CAP Mode for ease of use and fastest transient response or incurrent mode to support ceramic output capacitors. The 3-A sink/source LDOmaintains fast transient response only requiring 20-µF (2 × 10 µF) of ceramicoutput capacitance. In addition, the LDO supply input is available externally tosignificantly reduce the total power losses. The TPS51116 supports all of thesleep state controls placing VTT at high-Z in S3 (suspend to RAM) anddischarging VDDQ, VTT and VTTREF (soft-off) in S4/S5 (suspend to disk). TPS51116has all of the protection features including thermal shutdown and is offered inboth a 20-pin HTSSOP PowerPAD package and 24-pin 4×4 QFN.

Synchronous Buck Controller (VDDQ)

• Wide-Input Voltage Range: 3.0-V to 28-V
• D-CAP™ Mode with 100-ns Load Step Response
• Current Mode Option Supports Ceramic Output Capacitors
• Supports Soft-Off in S4/S5 States
• Current Sensing from R_DS(on) or Resistor
• 2.5-V (DDR), 1.8-V (DDR2), Adjustable to
  1.5-V (DDR3) or 1.2-V(LPDDR3) or
  Output Range 0.75-V to 3.0-V
• Equipped with Powergood, Overvoltage Protection and UndervoltageProtection

3-A LDO (VTT), Buffered Reference (VREF)

• Capable to Sink and Source 3 A
• LDO Input Available to Optimize Power Losses
• Requires only 20-µF Ceramic Output Capacitor
• Buffered Low Noise 10-mA VREF Output
• Accuracy ±20 mV for both VREF and VTT
• Supports High-Z in S3 and Soft-Off in S4/S5
• Thermal Shutdown