SRAM Chip Async Single 5V 1M-Bit 128K x 8 45ns 32-Pin TSOP-I

The CY62128E is a high performance CMOS static RAM organized as 128K words by 8 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life (MoBL) in portable applications. The device also has an automatic power down feature that significantly reduces power consumption when addresses are not toggling. Placing the device into standby mode reduces power consumption by more than 99 percent when deselected . The eight input and output pins (I/O0 through I/O7) are placed in a high impedance state when the device is deselected, the outputs are disabled, or a write operation is in progress . To write to the device, take Chip Enable and Write Enable inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16). To read from the device, take Chip Enable and Output Enable LOW while forcing Write Enable HIGH. Under these conditions, the contents of the memory location specified by the address pins appear on the I/O pins.

• Very high speed: 45 ns
• Temperature ranges:
  • Industrial: -40 °C to +85 °C
  • Automotive-A: -40 °C to +85 °C
  • Automotive-E: -40 °C to +125 °C
• Wide voltage range: 2.2 V to 3.6 V
• Pin compatible with CY62128B
• Ultra low standby power
  • Typical standby current: 1 µA
  • Maximum standby current: 4 µA(Industrial)
• Ultra low active power
  • Typical active current: 1.3 mA at f = 1 MHz
• Easy memory expansion with CE/ and OE1/, CE2, and features
• Automatic power-down when deselected
• Complementary metal oxide semiconductor (CMOS) for optimum speed and power
• Offered in Pb-free 32-pin SOIC, 32-pin thin small outline package (TSOP) Type I, and 32-pin shrunk thin small outline package (STSOP) packages