SRAM Chip Async Single 2.5V/3.3V 1M-Bit 128K x 8 45ns 32-Pin TSOP-I
The IS65WV1288DBLL are high-speed, 1M bit static RAMs organized as 128K words by 8 bits. It is fabricated using high performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CS1\ is HIGH (deselected) or when CS2 is low (deselected), the device assumes a standby mode at which the power dpation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE/) controls both writing and reading of the memory. The IS65WV1288DBLL are packaged in the JEDEC standard 32-pin TSOP (TYPEI), STSOP (TYPEI), SOP, and 36-pin mini BGA.
- High-speed access time: 35ns, 45ns, 55ns
- CMOS low power operation: 12 mW (typical) operating 4 µW (typical) CMOS standby
- TTL compatible interface levels
- Single power supply: 2.3V-3.6V Vdd
- Fully static operation: no Clock or refresh required
- Three state outputs
- Automotive temperature support
- Lead-free available
Especificaciones
| Brand | ISSI |
|---|---|
| Datasheet | |
| Number Of Words | 128 kWords |
| Density | 1 Mbit |
| Operating temperature | -40 to 125 °C |
| Pin Count | 32 |
| Number Of Ports | 1 |
| Mounting | Surface Mount |
| Address B | 17 Bit |
| Number Of | 8 Bit |
| Number Of | 8 Bit |
| Maximum O | 12 mA |
| Product description | 8.1 x 18.5 x 0.95 mm |
| Maximum R | 45 ns |
| Supplier | TSOP-I |
| Typical O | 2.5, 3.3 V |
| ECCN | EAR99 |
| Schedule B | 8542320040 |
| HTSN | 8542320041 |
| Country of origin | China |
| Screening Level | Automotive |
| Minimum O | 2.3 V |
| Maximum O | 3.6 V |
| Lead Finish | Matte Tin |
| Max Proce | 260 |
| Msl Level | 3 |
SKU: IS65WV1288DBLL-45TLA3