SRAM Chip Async Single 1M-Bit 64K x 16 15ns 44-Pin TSOP-II T/R

The CY7C1021CV26 is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A15). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A15).

• Temperature Range
  • Automotive: -40 °C to 125 °C
• High speed
  • tAA = 15 ns
• Optimized voltage range: 2.5 V to 2.7 V
• Low active power: 220 mW (Max)
• Automatic power-down when deselected
• Independent control of upper and lower bits
• CMOS for optimum speed/power
• Available in Pb-free and non Pb-free 44-pin TSOP II, 44-pin (400-Mil) Molded SOJ and Pb-free 48-ball FBGA packages