SRAM Chip Async Single 3.3V 32M-Bit 2M X 16 55ns 48-Pin TSOP-I Tray
SRAM Chip Async Single 3.3V 32M-Bit 2M X 16 55ns 48-Pin TSOP-I Tray
Specifications
| Brand | Alliance Memory |
|---|---|
| Datasheet | |
| Timing Type | Asynchronous |
| Number Of Words | 2 MWords |
| Density | 32 Mbit |
| Pin Count | 48 |
| Number Of Ports | 1 |
| Mounting | Surface Mount |
| Address B | 21/22 Bit |
| Number Of | 16 Bit |
| Number Of | 16 Bit |
| Maximum O | 20 mA |
| Product description | 12 x 18.4 x 1 mm |
| Maximum R | 55 ns |
| Supplier | TSOP-I |
| Typical O | 3.3000 V |
| ECCN | EAR99 |
| Schedule B | 8542320040 |
| HTSN | 8542320041 |
| Country of origin | Taiwan |
| Screening Level | Industrial |
| Minimum O | 2.7 V |
| Maximum O | 3.6 V |
| Data Rate | SDR |
| Msl Level | 3 |
SKU: AS6C3216A-55TIN