SRAM Chip Async Single 3.3V 32M-Bit 2M x 16 10ns 48-Pin TSOP-I

The IS61WV204816BLL are high-speed, 32M bit static RAMs organized as 2048K words by 16 bits. It is fabricated high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CS# is HIGH (deselected), the device assumes standby mode at which the power dpation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE#) controls both writing and reading of the memory. A data byte allows Upper Byte (UB#) and Lower Byte (LB#) access. The device is packaged in the JEDEC standard 48-Pin TSOP (TYPE I) and 48-pin mini BGA (6mm x 8mm).

• High- performance, low power CMOS process
• Multiple center power and ground pins forgreater noise immunity
• Easy memory expansion with CS# and OE#
• TTL compatible inputs and outputs
• Single power supply
  • 2.4V-3.6V Vdd
• Packages available :
  • 48 ball mini BGA (6mm x 8mm)
  • 48 pin TSOP (Type I)
• Industrial and Automotive temperature support
• Lead-free available
• Data Control for upper and lower bytes