SRAM Chip Async Single 1.8V 2M-Bit 128K x 16 70ns 44-Pin TSOP-II T/R

The IS62WV10248ALL is a high-speed, 2M bit static RAMs organized as 128k words by 16 bits. It is fabricated high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CS1\ is HIGH (deselected) or when CS2 is LOW (deselected), the device assumes a standby mode at which the power dpation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE\) controls both writing and reading of the memory. The IS62WV10248BLL is packaged in the JEDEC standard 48-pin mini BGA (7.2mm x 8.7mm).

• High-speed access time: 45ns, 55ns, 70ns
• CMOS low power operation
  • 36 mW (typical) operating
  • 9 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply: 1.65V-2.2V Vdd
• Fully static operation: no clock or refreshrequired
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• 2CS Option Available
• Lead-free available