SRAM Chip Sync Quad 2.5V 18M-Bit 512K x 36 3.4ns 165-Pin FBGA

The CY7C1370DV25 is 2.5 V, 512 K × 36 and 1-Mbit × 18 synchronous pipelined burst SRAMs with No Bus Latency (NoBL) logic, respectively. They are designed to support unlimited true back-to-back read/write operations with no wait states. The CY7C1370DV25 equipped with the advanced NoBL logic required to enable consecutive read/write operations with data being transferred on every clock cycle.

• Pin-compatible and functionally equivalent to ZBT™
• Supports 200-MHz bus operations with zero wait states
• Available speed grades are 200 and 167 MHz
• Internally self-timed output buffer control to eliminate the need to use asynchronous OE
• Fully registered (inputs and outputs) for pipelined operation
• Byte write capability
• Single 2.5 V core power supply (VDD)
• 2.5 V I/O power supply (VDDQ)
• Fast clock-to-output times
• For more, see pdf