SRAM Chip Async Single 5V 4M-Bit 512K x 8 70ns 32-Pin SOIC

The CY62148BN is a high performance CMOS static RAM organized as 512K words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable, an active LOW Output Enable, and tri-state drivers. This device has an automatic power down feature that reduces power consumption by more than 99% when deselected. To write to the device, take Chip Enable and Write Enable inputs LOW. Data on the eight I/O pins is then written into the location specified on the address pins. To read from the device, take Chip Enable and Output Enable LOW while forcing Write Enable HIGH for read. Under these conditions, the contents of the memory location specified by the address pins appear on the I/O pins. The eight input/output pins go into a high-impedance state when the device is deselected, the outputs are disabled, or a write operation is in progress.

• 4.5V-5.5V operation
• Low active power
  • Typical active current: 2.5 mA @ f = 1 MHz
  • Typical active current:12.5 mA @ f = fmax
• Low standby current
• Automatic power down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE/ and OE/ and features
• CMOS for optimum speed and power
• Available in standard Pb-free and non Pb-free 32-lead (450-mil) SOIC and 32-lead TSOP II packages