SRAM Chip Async Single 1.8V 16M-Bit 1M x 16 15ns 54-Pin TSOP-II

The CY7C1061DV18 is a high performance CMOS Static RAM (SRAM) organized as 1,048,576 words by 16 bits. To write to the device, enable the chip while forcing the Write Enable input LOW. If Byte Low Enable is LOW, then data from I/O pins, is written into the location specified on the address pins. If Byte High Enable is LOW, then data from I/O pins is written into the location specified on the address pins.

• High Speed
  • tAA = 15 ns
• Low Active Power
  • ICC = 150 mA at 67 MHz
• Low complementary metal oxide semiconductor (CMOS) Standby Power
  • ISB2 = 25 mA
• Operating voltages of 1.7 V to 2.2 V
• 1.5 V data retention
• Automatic power-down when deselected
• Transistor-transistor logic (TTL) compatible inputs and outputs
• Easy memory expansion with CE1/ and CE2/ features
• Available in Pb-free 54-pin thin small outline package (TSOP) Type II package and 48-ball Very Fine-Pitch Ball Grid Array (VFBGA)