SRAM Chip Async Dual 5V 1M-Bit 64K x 16 15ns 100-Pin TQFP Tube

The CY7C028 is low power CMOS 32 K, 64 K × 16 dual-port static RAMs. Various arbitration schemes are included on the devices to handle situations when multiple processors access the same piece of data. Two ports are provided, permitting independent, asynchronous access for reads and writes to any location in memory. The devices can be used as standalone 16-bit dual-port static RAMs or multiple devices can be combined to function as a 32-bit or wider master/slave dual-port static RAM. An M/S pin is provided for implementing 32-bit or wider memory applications without the need for separate master and slave devices or additional discrete logic. Application areas include interprocessor and multiprocessor designs, communications status buffering, and dual-port video/graphics memory.

• True dual-ported memory cells which allow simultaneous access of the same memory location
• 64 K × 16 organization (CY7C028)
• 0.35 micron CMOS for optimum speed and power
• High speed access: 15 and 20 ns
• Low operating power
• Active: ICC = 180 mA (typical)
• Standby: ISB3 = 0.05 mA (typical)
• Fully asynchronous operation
• Automatic power down
• Expandable data bus to 32 bits or more using Master/Slave chip select when using more than one device
• On-chip arbitration logic
• Semaphores included to permit software handshaking between ports
• ??T flags for port-to-port communication
• Separate upper-byte and lower-byte control
• Dual chip enables
• Pin select for Master or Slave
• Commercial and industrial temperature ranges
• Available in 100-pin TQFP
• Pb-free packages available