MCU 32-bit C2000 C28x RISC 128KB Flash 1.8V/3.3V 64-Pin TQFP Tray

The F2803x Piccolo family of microcontrollers provides the power of the C28x core and Control Law Accelerator (CLA) coupled with highly integrated control peripherals in low pin-count devices. This family is code-compatible with previous C28x-based code, as well as providing a high level of analog integration. An internal voltage regulator allows for single-rail operation. Enhancements have been made to the HRPWM module to allow for dual-edge control (frequency modulation). Analog comparators with internal 10-bit references have been added and can be routed directly to control the PWM outputs. The ADC converts from 0 to 3.3-V fixed full-scale range and supports ratio-metric VREFHI/VREFLO references. The ADC interface has been optimized for low overhead and latency. 

High-Efficiency 32-Bit CPU (TMS320C28x)

• 60 MHz (16.67-ns Cycle Time)
• 16 x 16 and 32 x 32 MAC Operations
• 16 x 16 Dual MAC
• Harvard Bus Architecture
• Atomic Operations
• Fast Interrupt Response and Processing
• Unified Memory Programming Model
• Code-Efficient (in C/C++ and Assembly)

Programmable Control Law Accelerator (CLA)

• 32-Bit Floating-Point Math Accelerator
• Executes Code Independently of the Main CPU

Endianness: Little Endian

JTAG Boundary Scan Support⁽¹⁾

Low Cost for BothDevice and System:

• Single 3.3-V Supply
• No Power Sequencing Requirement
• Integrated Power-on Reset and Brown-out Reset
• Low Power
• No Analog Support Pins

Clocking:

• Two Internal Zero-pin Oscillators
• On-Chip Crystal Oscillator/External Clock Input
• Dynamic PLL Ratio Changes Supported
• Watchdog Timer Module
• Missing Clock Detection Circuitry

Up to 45 Individually Programmable, Multiplexed GPIO Pins WithInput Filtering

Peripheral Interrupt Expansion (PIE) Block That Supports All PeripheralInterrupts

Three 32-Bit CPU Timers

Independent 16-Bit Timer in Each ePWM Module

On-Chip Memory

• Flash, SARAM, OTP, Boot ROM Available

Code-Security Module

128-Bit Security Key/Lock

• Protects Secure Memory Blocks
• Prevents Firmware Reverse Engineering

Serial Port Peripherals

• One SCI (UART) Module
• Two SPI Modules
• One Inter-Integrated-Circuit (I²C) Bus
• One Local Interconnect Network (LIN) Bus
• One Enhanced Controller Area Network (eCAN) Bus

Enhanced Control Peripherals

• Enhanced Pulse Width Modulator (ePWM)
• High-Resolution PWM (HRPWM) Module
• Enhanced Capture (eCAP) Module
• High-Resolution Input Capture (HRCAP) Module
• Enhanced Quadrature Encoder Pulse (eQEP) Module
• Analog-to-Digital Converter (ADC)
• On-Chip Temperature Sensor
• Comparator

Advanced Emulation Features

• Analysis and Breakpoint Functions
• Real-Time Debug via Hardware

2803x Packages

• 56-Pin RSH Very Small Quad Flatpack (No Lead) (VQFN)
• 64-Pin PAG Thin Quad Flatpack (TQFP)
• 80-Pin PN Low-Profile Quad Flatpack (LQFP)