Clock Divider 1-IN 8-Pin SOIC

The SY100EL32V are integrated ÷2 dividers. The differential clock inputs and the VBB allow a differential, single-ended or AC-coupled interface to the device. If used, the VBB output should be bypassed to ground with a 0.01µF capacitor. Also note that the VBB is designed to be used as an input bias on the EL32V only; the VBB output has limited current sink and source capability. The reset pin is asynchronous and is asserted on the rising edge. Upon power-on, the internal flip-flop will attain a random state; the reset allows for the synchronization of multiple EL32Vs in a system. 3.3V and 5V power supply options 510ps propagation delay 3.0GHz toggle frequency High bandwidth output transistions Internal 75K? input pull-down resistors Available in 8-pin SOIC package