SRAM Chip Sync Single 3.3V/5V 512K-Bit 512K x 8 25ns 8-Pin TSSOP T/R
The Microchip Technology Inc. 23LC512 is 512 Kbit Serial SRAM devices. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a Chip Select (CS) input. Additionally, SDI (Serial Dual Interface) and SQI (Serial Quad Interface) is supported if your application needs faster data rates. This device also supports unlimited reads and writes to the memory array. The 23LC512 is available in standard packages including 8-lead SOIC, PDIP and 8-lead TSSOP.
- SPI-Compatible Bus Interface:- 20 MHz Clock rate- SPI/SDI/SQI mode
- Low-Power CMOS Technology:- Read Current: 3 mA at 5.5V, 20 MHz- Standby Current: 4 µA at +85°C
- Unlimited Read and Write Cycles
- Zero Write Time
- 64K x 8-bit Organization:- 32-byte page
- Byte, Page and Sequential mode for Reads andWrites
- High Reliability
- Pb-Free and RoHS Compliant, Halogen Free
- 8 Lead SOIC, TSSOP and PDIP Packages
- Temp Range: -40°C to +85°C
规格参数
| Brand | Microchip |
|---|---|
| Datasheet | |
| Timing Type | Synchronous |
| Number Of Words | 512 kWords |
| Density | 512 Kb |
| Operating temperature | -40 to 85 °C |
| Pin Count | 8 |
| Number Of Ports | 1 |
| Mounting | Surface Mount |
| Address B | 8 Bit |
| Number Of | 8 Bit |
| Number Of | 8 Bit |
| Maximum O | 10 mA |
| Product description | 3 x 4.4 x 1 |
| Maximum R | 25 ns |
| Supplier | TSSOP |
| Typical O | 3.3, 5 V |
| ECCN | EAR99 |
| Schedule B | 8542320050 |
| HTSN | 8542320051 |
| Country of origin | Thailand |
| Screening Level | Industrial |
| Minimum O | 2.5 V |
| Maximum O | 5.5 V |
| Maximum C | 20 MHz |
| Lead Finish | Matte Tin |
| Max Proce | 260 |
| Msl Level | 1 |
SKU: 23LC512T-I/ST