SRAM Chip Sync Dual 3.3V 144K-Bit 16K x 9-Bit 25ns/12ns 100-Pin TQFP

The CY7C09169AV is high-speed synchronous CMOS 8K and 16K x 9 dual-port static RAMs. Two ports are provided, permitting independent, simultaneous access for reads and writes to any location in memory. Registers on control, address, and data lines allow for minimal set-up and hold times. In pipelined output mode, data is registered for decreased cycle time. Clock to data valid tCD2 = 9 ns (pipelined). Flow-through mode can also be used to bypass the pipelined output register to eliminate access latency. In flow-through mode data will be available tCD1 = 18 ns after the address is clocked into the device. Pipelined output or flow-through mode is selected via the FT/Pipe pin. Each port contains a burst counter on the input address register. The internal write pulse width is independent of the LOW- to-HIGH transition of the clock signal. The internal write pulse is self-timed to allow the shortest possible cycle times.

• True Dual-Ported memory cells which allow simultaneous access of the same memory location
• Two Flow-Through/Pipelined devices
  • 16K x 9 organization (CY7C09169AV)
• Three Modes
  • Flow-Through
  • Pipelined
  • Burst
• Pipelined output mode on both ports allows fast 83-MHz operation
• 0.35-micron CMOS for optimum speed/power
• High-speed clock to data access 9 and 12 ns (max.)
• 3.3V Low operating power
  • Active = 135 mA (typical)
  • Standby = 10 µA (typical)
• Fully synchronous interface for easier operation
• Burst counters increment addresses internally
  • Shorten cycle times
  • Minimize bus noise
  • Supported in Flow-Through and Pipelined modes
• Dual Chip Enables for easy depth expansion
• Automatic power-down
• Commercial and industrial temperature ranges
• Available in 100-pin TQFP
• Pb-Free packages available