SRAM Chip Async Single 5V 4M-Bit 512K x 8 70ns 32-Pin SOIC T/R

The CY62148B is a high performance CMOS static RAM organized as 512 K words by 8-bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life (MoBL in portable applications. The device also has an automatic power-down feature that significantly reduces power consumption. Placing the device in standby mode reduces power consumption by more than 99 percent when deselected. The eight input and output pins are placed in a high impedance state when the device is deselected, the outputs are disabled, or during a write operation. To write to the device, take Chip Enable and Write Enable inputs LOW. Data on the eight I/O pins is then written into the location specified on the address pins. To read from the device, take Chip Enable and Output Enable LOW while forcing Write Enable HIGH. Under these conditions, the contents of the memory location specified by the address pins appear on the I/O pins. TThe CY62148B is available in a standard 32-pin 450-mil-wide body width SOIC, 32-pin TSOP II, and 32-pin Reverse TSOP II packages.

• High Speed: 70 ns
• 4.5V-5.5V operation
• Low active power
  • Typical active current: 2.5 mA @ f = 1 MHz
  • Typical active current: 12.5 mA @ f = fmax(70 ns)
• Low standby current
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE/ and OE/ and features
• CMOS for optimum speed/power
• Available in standard 32-lead (450-mil) SOIC, 32-lead TSOP II and 32-lead Reverse TSOP II packages