SRAM Chip Async Dual 5V 128K-Bit 16K x 8 20ns 68-Pin PLCC

The CY7C006A is low-power CMOS 16 K × 8 dual-port static RAMs. Various arbitration schemes are included on the devices to handle situations when multiple processors access the same piece of data. Two ports are provided, permitting independent, asynchronous access for reads and writes to any location in memory. The devices can be utilized as standalone 8-bit dual-port static RAMs or multiple devices can be combined in order to function as a 16-bit or wider master/slave dual-port static RAM.

• True dual-ported memory cells which allow simultaneous access of the same memory location
• 16 K × 8 organization (CY7C006A)
• 0.35-micron CMOS for optimum speed/power
• High-speed access: 20 ns
• Low operating power
  • Active: ICC = 180 mA (typical)
  • Standby: ISB3 = 0.05 mA (typical)
• Fully asynchronous operation
• Automatic power-down
• Expandable data bus to 16 bits or more using Master/Slave chip select when using more than one device
• On-chip arbitration logic
• Semaphores included to permit software handshaking between ports
• INT/ flags for port-to-port communication
• Pin select for Master or Slave
• Commercial temperature range
• Available in 68-pin PLCC (CY7C006A), 64-pin TQFP (CY7C006A)
• Pb-free packages available