FIFO Mem Async Dual Width Uni-Dir 512 x 18 56-Pin SSOP T/R

A FIFO memory is a storage device that allows data to be written into and read from its array at independent data rates. The SN74ACT7804 is a 512-word by 18-bit FIFO for high speed and fast access times. It processes data at rates up to 50 MHz and access times of 15 ns in a bit-parallel format.Data is written into memory on a low-to-high transition at the load-clock (LDCK) input and is read out on a low-to-high transition at the unload-clock (UNCK) input. The memory is full when the number of words clocked in exceeds the number of words clocked out by 512. When the memory is full, LDCK signals have no effect on the data residing in memory. When the memory is empty, UNCK signals have no effect. Status of the FIFO memory is monitored by the full (FULL\), empty (EMPTY\), half-full (HF), and almost-full/almost-empty (AF/AE) flags. The FULL\ output is low when the memory is full and high when the memory is not full. The EMPTY\ output is low when the memory is empty and high when it is not empty. The HF output is high when the FIFO contains 256 or more words. The AF/AE status flag is a programmable flag. The first one or two low-to-high transitions of LDCK after reset are used to program the almost-empty offset value (X) and the almost-full offset value (Y) if program enable (PEN\) is low. The AF/AE flag is high when the FIFO contains X or fewer words or (512 - Y) or more words. The AF/AE flag is low when the FIFO contains between (X + 1) and (511 - Y) words. A low level on the reset (RESET) input resets the internal stack pointers and sets FULL\ high, AF/AE high, HF low, and EMPTY\ low. The Q outputs are not reset to any specific logic level. The FIFO must be reset upon power up. The first word loaded into empty memory causes EMPTY\ to go high and the data to appear on the Q outputs. It is important to note that the first word does not have to be unloaded. The data outputs are noninverting with respect to the data inputs and are in the high-impedance state when the output-enable (OE) input is high. The SN74ACT7804 is characterized for operation from 0°C to 70°C.

Member of the Texas Instruments Widebus^TM Family

Load Clock and Unload Clock Can Be Asynchronous or Coincident

512 Words by 18 Bits

Low-Power Advanced CMOS Technology

Full, Empty, and Half-Full Flags

Programmable Almost-Full/Almost-Empty Flag

Fast Access Times of 15 ns With a 50-pF Load and All Data Outputs Switching Simultaneously

Data Rates up to 50 MHz

3-State Outputs

Pin-to-Pin Compatible With SN74ACT7806 and SN74ACT7814

Packaged in Shrink Small-Outline 300-mil Package Using 25-mil Center-to-Center Spacing