SYNERGY MCU PLATFORM S5D3 256K 100LQFP, R7FS5D37A3A01CFP#AA0, Renesas Electronics

Описание

The S5D3 adds a new tier to the S5 MCU group for applications that require a high-performance Cortex M4F core but doesn’t require on-chip graphic acceleration or Ethernet connectivity. It features large embedded RAM – suitable for handling communication stacks to bring up performance without an external component. In addition, the integration of the Secure Cryptographic Engine (SCE7) provides a security integration which is far above other competitive solutions in the market for this class of microcontroller. The S5D3 is built on a highly efficient 40nm process, and fully supported by the Synergy Software Package (SSP), which allows customers to do seamless transition between different products using a common API for integrated low level drivers, included middleware packages and application frameworks.

• Arm Cortex-M4 Core with Floating Point Unit (FPU)
  • Armv7E-M architecture with DSP instruction set
  • Maximum operating frequency: 120 MHz
  • Support for 4-GB address space
  • On-chip debugging system: JTAG, SWD, and ETM
  • Boundary scan and Arm Memory Protection Unit (Arm MPU)
• Memory
  • 512-KB code flash memory (40 MHz zero wait states)
  • 8-KB data flash memory (125,000 erase/write cycles)
  • 256-KB SRAM
  • Flash Cache (FCACHE)
  • Memory Protection Units (MPU)
  • Memory Mirror Function (MMF)
  • 128-bit unique ID
• Connectivity
  • USB 2.0 Full-Speed (USBFS) module
    • On-chip transceiver
  • Serial Communications Interface (SCI) with FIFO × 7
  • Serial Peripheral Interface (SPI) × 2
  • I2C bus interface (IIC) × 2
  • CAN module (CAN) × 2
  • Serial Sound Interface Enhanced (SSIE)
  • SD/MMC Host Interface (SDHI) × 2
  • Quad Serial Peripheral Interface (QSPI)
  • IrDA interface
  • Sampling Rate Converter (SRC)
  • External address space
    • 8-bit bus space
• Analog
  • 12-bit A/D Converter (ADC12) with 3 sample-and-hold circuits each × 2
  • 12-bit D/A Converter (DAC12) × 2
  • High-Speed Analog Comparator (ACMPHS) × 6
  • Programmable Gain Amplifier (PGA) × 6
  • Temperature Sensor (TSN)
• Timers
  • General PWM Timer 32-bit Enhanced High Resolution (GPT32EH) × 4
  • General PWM Timer 32-bit Enhanced (GPT32E) × 4
  • General PWM Timer 32-bit (GPT32) × 5
  • Asynchronous General-Purpose Timer (AGT) × 2
  • Watchdog Timer (WDT)
• Safety
  • Error Code Correction (ECC) in SRAM
  • SRAM parity error check
  • Flash area protection
  • ADC self-diagnosis function
  • Clock Frequency Accuracy Measurement Circuit (CAC)
  • Cyclic Redundancy Check (CRC) calculator
  • Data Operation Circuit (DOC)
  • Port Output Enable for GPT (POEG)
  • Independent Watchdog Timer (IWDT)
  • GPIO readback level detection
  • Register write protection
  • Main oscillator stop detection
  • Illegal memory access
• System and Power Management
  • Low power modes
  • Realtime Clock (RTC) with calendar and VBATT support
  • Event Link Controller (ELC)
  • DMA Controller (DMAC) × 8
  • Data Transfer Controller (DTC)
  • Key Interrupt Function (KINT)
  • Power-on reset
  • Low Voltage Detection (LVD) with voltage settings
• Security and Encryption
  • AES128/192/256
  • 3DES/ARC4
  • SHA1/SHA224/SHA256/MD5
  • GHASH
  • RSA/DSA/ECC
  • True Random Number Generator (TRNG)
• Human Machine Interface (HMI)
  • Capacitive Touch Sensing Unit (CTSU)
• Multiple Clock Sources
  • Main clock oscillator (MOSC) (8 to 24 MHz)
  • Sub-clock oscillator (SOSC) (32.768 kHz)
  • High-speed on-chip oscillator (HOCO) (16/18/20 MHz)
  • Middle-speed on-chip oscillator (MOCO) (8 MHz)
  • Low-speed on-chip oscillator (LOCO) (32.768 kHz)
  • IWDT-dedicated on-chip oscillator (15 kHz)
  • Clock trim function for HOCO/MOCO/LOCO
  • Clock out support
• General-Purpose I/O Ports
  • Up to 76 input/output pins
    • Up to 9 CMOS input
    • Up to 67 CMOS input/output
      • Up to 14 input/output 5 V tolerant
      • Up to 13 high current (20 mA)