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SRAM Chip Sync Dual 3.3V 9M-Bit 512K x 18 7.5ns 100-Pin TQFP T/R

The 9 Meg IS61NLF51218 are feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, "no wait" state, device for networking and communications applications. They are organized as 512K words by 18 bits fabricated with advanced CMOS technology. Incorporating a "no wait" state feature, wait cycles are eliminated when the bus switches from read to write, or write to read. This device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers are controlled by a positive-edge-triggered single clock input. Operations may be suspended and all synchronous inputs ignored when Clock Enable, CKE is HIGH .In this state the internal device will hold their previous values. All Read, Write and Deselect cycles are initiated by the ADV input. When the ADV is HIGH the internal burst counter is incremented. New external addresses can be loaded when ADV is LOW. Write cycles are internally self-timed and are initiated by the rising edge of the clock inputs and when WE is LOW. Separate byte enables allow individual bytes to be written. A burst mode pin (MODE) defines the order of the burst sequence. When tied HIGH, the interleaved burst sequence is selected. When tied LOW, the linear burst sequence is selected.
  • 100 percent bus utilization
  • No wait cycles between Read and Write
  • Internal self-timed write cycle
  • Individual Byte Write Control
  • Single Read/Write control pin
  • Clock controlled, registered address, data and control
  • Interleaved or linear burst sequence control using MODE input
  • Three chip enables for simple depth expansion and address pipelining
  • Power Down mode
  • Common data inputs and data outputs
  • CKE pin to enable clock and suspend operation
  • JEDEC 165-ball PBGA package
  • Power Supply: Vdd 2.5V (± 5%), Vddq 2.5V (± 5%)
  • JTAG Boundary Scan for PBGA packages
  • Commercial and Industrial temperature available
  • Lead-free available.

Характеристики

Бренд ISSI
Datasheet PDF
Timing Type Synchronous
Number Of Words 512 kWords
Density 9 Mbit
Рабочая температура -40 to 85 °C
Pin Count 100
Number Of Ports 2
Mounting Surface Mount
Address B 19 Bit
Number Of 18 Bit
Number Of 18 Bit
Maximum O 280 mA
Описание продукта 14 x 20 x 1.4 mm
Maximum R 7.5 ns
Supplier TQFP
Typical O 3.3000 V
ECCN EAR99
Schedule B 8542320040
HTSN 8542320041
Страна происхождения Taiwan
Screening Level Industrial
Minimum O 3.165 V
Maximum O 3.465 V
Maximum C 117 MHz
Architecture Flow-Through
Lead Finish Tin|Lead
Max Proce 245 °C
SKU: IS61NLF51218A-7.5TQI-TR