SRAM Chip Async Single 3.3V 4M-Bit 256K x 16 12ns 44-Pin TSOP-II

The CY7C1041BNV33 is a high-performance CMOS Static RAM organized as 262,144 words by 16 bits. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins, is written into the location specified on the address pins. If Byte High Enable (BHE) is LOW, then data from I/O pins is written into the location specified on the address pins.

• High speed
  • tAA = 12 ns
• Low active power
  • 612 mW (max.)
• Low CMOS standby power
  • 1.8 mW (max.)
• 2.0 V Data Retention (660 µW at 2.0 V retention)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE/ and OE/ features