SRAM Chip Async Single 1.8V 16M-Bit 1M x 16 55ns 48-Pin VFBGA

The CY62167EV18 is a high performance CMOS static RAM organized as 1M words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery LifeTM (MoBL) in portable applications such as cellular telephones. The device also has an automatic power down feature that reduces power consumption by 99 percent when addresses are not toggling. Place the device into standby mode when deselected. The input and output pins are placed in a high impedance state when: the device is deselected; outputs are disabled; both Byte High Enable and Byte Low Enable are disabled; and a write operation is in progress. To write to the device, take Chip Enables and Write Enable input LOW. If Byte Low Enable is LOW, then data from I/O pins is written into the location specified on the address pins. If Byte High Enable is LOW, then data from I/O pins is written into the location specified on the address pins (A0 through A19). To read from the device, take Chip Enables and Output Enable LOW while forcing the Write Enable HIGH. If Byte Low Enable is LOW, then data from the memory location specified by the address pins appears on I/O0 to I/O7. If Byte High Enable is LOW, then data from memory appears on I/O8 to I/O15.

• Very high speed: 55 ns
• Wide voltage range: 1.65 V to 2.25 V
• Ultra low standby power
  • Typical standby current: 1.5 µA
  • Maximum standby current: 12 µA
• Ultra low active power
  • Typical active current: 2.2 mA at f = 1 MHz
• Easy memory expansion with CE1, CE2, and OE features
• Automatic power down when deselected
• CMOS for optimum speed and power
• Offered in Pb-free 48-ball very fine ball grid array (VFBGA) packages