PHY 1-CH 64-Pin HVQFP EP Tray

The primary application of these devices is to provide building blocks for point-to-point baseband datatransmission over controlled impedance media of 50 ? or 75 ?. The transmission media can be printed-circuitboard traces, copper cables or fiber-optical media. The ultimate rate and distance of data transfer is dependentupon the attenuation characteristics of the media and the noise coupling to the environment.The TLK2201A and TLK2201AI perform the data serialization, deserialization, and clock extraction functions for aphysical layer interface device. The transceiver operates at 1.25 Gbps (typical), providing up to 1 Gbps of databandwidth over a copper or optical media interface.The TLK2201A and TLK2201AI support both the defined 10-bit interface (TBI) and a reduced 5-bit interfaceutilizing double data rate (DDR) clocking. In the TBI mode the serializer/deserializer (SERDES) accepts 10-bitwide 8b/10b parallel encoded data bytes. The parallel data bytes are serialized and transmitted differentially atPECL compatible voltage levels. The SERDES extracts clock information from the input serial stream anddeserializes the data, outputting a parallel 10-bit data byte.In the DDR mode the parallel interface accepts 5-bit wide 8b/10b encoded data aligned to both the rising andfalling edge of the reference clock. The data is clocked most significant bit first, (bits 0–4 of the 8b/10b encodeddata) on the rising edge of the clock and the least significant bits (bits 5–9 of the 8b/10b encoded data) areclocked on the falling edge of the clock.The TLK2201A and TLK2201AI provide a comprehensive series of built-in tests for self-test purposes includingloopback and pseudorandom binary sequence (PRBS) generation and verification. An IEEE 1149.1 JTAG port isalso supportedThe TLK2201A and TLK2201AI are housed in a high performance, thermally enhanced, 64-pin VQFP PowerPADpackage. Use of the PowerPAD package does not require any special considerations except to note that thePowerPAD, which is an exposed die pad on the bottom of the device, is a metallic thermal and electricalconductor. It is recommended that the TLK2201A and TLK2201AI PowerPADs be soldered to the thermal landon the board.The TLK2201A is characterized for operation from 0°C to 70°C. The TLK2201AI is characterized for operationfrom –40°C to 85°C.The TLK2201A and TLK2201AI use a 2.5-V supply. The I/O section is 3.3-V compatible. With the 2.5-V supplythe chipset is very power-efficient, dissipating less than 200 mW typical power when operating at 1.25 Gbps.The TLK2201A and TLK2201AI are designed to be hot plug capable. A power-on reset causes RBC0, RBC1, theparallel output signal terminals, TXP, and TXN to be held in high-impedance state

• 1 to 1.6 Gigabits Per Second (Gbps) Serializer/Deserializer (TLK2201A)
• IEEE 802.3 Gigabit Ethernet Compliant
• 1.2 to 1.6 Gigabits Per Second (Gbps) Serializer/Deserializer (TLK2201AI)
• Advanced 0.25 µm CMOS Technology
• No External Filter Capacitors Required
• Low Power Consumption <200 mW at 1.25 Gbps
• Comprehensive Suite of Built-In Testability
• IEEE 1149.1 JTAG Support
• LVPECL Compatible Differential I/O on High Speed Interface
• 2.5-V Supply Voltage for Lowest Power Operation
• Single Monolithic PLL Design
• 3.3-V Tolerant on LVTTL Inputs
• Support For 10 Bit Interface or Reduced Interface 5 Bit DDR (Double Data Rate) Clocking
• Hot Plug Protection
• 64-Pin VQFP With Thermally Enhanced Package (PowerPAD™)
• Industrial Temperature Range From –40°C to 85°C (TLK2201AI)