PHY 1-CH 100Mbps 32-Pin VQFN Tray

The KSZ8091 is a single-supply 10Base-T/100Base-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair (UTP) cable. The KSZ8091 is a highly-integrated PHY solution. It reduces board cost and simplifies board layout by using on-chip termination resistors for the differential pairs, by integrating a low-noise regulator to supply the 1.2V core and by offering a flexible 1.8/2.5/3.3V digital I/O interface. The KSZ8091MNX and KSZ8091MLX offer the Media Independent Interface (MII), while the the KSZ8091RNx offer the Reduced Media Independent Interface (RMII) for direct connection with MII/RMII-compliant Ethernet MAC processors and switches. Energy Efficient Ethernet (EEE) provides power saving during idle traffic periods and Wake-on-LAN (WOL) provides a mechanism for the KSZ8091 to wake up a system that is in standby power mode. The KSZ8091 provides diagnostic features to facilitate system bring-up and debugging in production testing and in product deployment. Parametric NAND tree support enables fault detection between KSZ8091 I/Os and the board. Microchip"s LinkMD® TDR-based cable diagnostics identify faulty copper cabling. The KSZ8091RNA and KSZ8091RND are available in a 24-pin (4mm x 4mm) QFN package. The KSZ8091MNX and KSZ8091RNB are available in a 32-pin, lead-free QFN packages. The KSZ8091MLX is available in a 48-pin (7mm x 7mm) LQFP package. Single-chip 10Base-T/100Base-TX IEEE 802.3 compliant Ethernet transceiver Energy Efficient Ethernet (EEE) support with low-power idle (LPI) mode and clock stoppage (MII version only) for 100Base-TX and transmit amplitude reduction with 10Base-Te option Wake-on-LAN (WOL) support with either magic packet, link status change, or robust custom-packet detection Power-down and power-saving modes MII interface support (KSZ8091MNX, KSZ8091MLX) RMII v1.2 interface support with a 50MHz reference clock output to MAC and an option to input a 50MHz reference clock (KSZ8091RNB) Back-to-back mode support for a 100Mbps copper repeater MDC/MDIO management interface for PHY register configuration Programmable interrupt output LED outputs for link and activity status indication, plus speed indication for KSZ8091RNB On-chip termination resistors for the differential pairs Baseline wander correction HP Auto MDI/MDI-X to reliably detect and correct straight-through and crossover cable connections with disable and enable option Auto-negotiation to automatically select the highest link-up speed (10/100Mbps) and duplex (half/full) LinkMD® TDR-based cable diagnostics to identify faulty copper cabling Parametric NAND Tree support for fault detection between chip I/Os and the board Loopback modes for diagnostics Single 3.3V power supply with VDD I/O options for 1.8V, 2.5V, or 3.3V Built-in 1.2V regulator for core Available in 24-pin (4mm x 4mm) QFN, 32-pin (5mm x 5mm) QFN and 48-pin (7mm x 7mm) LQFP packages