PHY 1-CH 1000Mbps 135-Pin QFN

The VSC8501XML device is designed for space-constrained 10/100/1000BASE-T applications. It features integrated line-side termination to conserve board space, to lower EMI, and to improve system performance. To further reduce system complexity, component count, and system cost, the VSC8501 device can operate from a single 3.3 V supply using integrated voltage regulators that provide the necessary 1.0 V and 2.5 V rails for operation. Additionally, integrated RGMII timing compensation eliminates the need for on-board delay lines. The VSC8501XML device includes Microsemi’s EcoEthernet 2.0 technology that supports Energy Effi cient Ethernet and power saving features to reduce power based on link state and cable reach. The device optimizes power consumption in all link operating speeds and features Wake-on-LAN (WOL) power management using magic packets The VSC8501XML device also includes fast link failure indication for highavailability networks. Fast link failure indication identifi es the onset of a link failure in less than 1 ms typical to go beyond the IEEE 802.3 standard requirement of 750 ms ±10 ms (link master). Synchronous Ethernet and Ring Resiliency are supported. The device has two recovered clock outputs for Synchronous Ethernet applications. Programmable clock squelch control is included to inhibit undesirable clocks from propagating and to help prevent timing loops. Ring Resiliency allows a PHY port to switch between master and slave timing references with no link drop in 1000BASE-T mode.

• EcoEthernet™ 2.0, the gold standard for Energy Effi cient Ethernet (EEE)
• Wake-on-LAN (WOL)
• Fast link failure indication
• Synchronous Ethernet support
• Dual recovered clocks for timing reference
• Ring Resiliency™
• Integrated voltage regulator
• Pin compatible with VSC8502XML