Описание
The TMP86FH47BUG is a single-chip 8-bit high-speed and high-functionality microcomputer incorporating 16384 bytes of Flash Memory. It is pin-compatible with the TMP86CH47AUG/TMP86C847UG (Mask ROM version). The TMP86FH47BUG can realize operations equivalent to those of the TMP86CH47AUG/TMP86C847UG by programming the on-chip Flash Memory.
- 8-bit single chip microcomputer
- Instruction execution time :
- 0.25 µs (at 16 MHz)
- 122 µs (at 32.768 kHz)
- 132 types & 731 basic instructions
- 18interrupt sources (External : 6 Internal : 12)
- Input / Output ports (35 pins)
- Large current output: 19pins (Typ. 20mA), LED direct drive
- Prescaler
- Time base timer
- Divider output function
- Watchdog Timer
- 16-bit timer counter: 1 ch
- Timer, External trigger, Window, Pulse width measurement, Event counter, Programmable pulse generate (PPG) modes
- 8-bit timer counter : 2 ch
- Timer, Event counter, Programmable divider output (PDO),
- Pulse width modulation (PWM) output,
- Programmable pulse generation (PPG),
- 16bit mode (8bit timer 2ch combination) modes
- Serial Interface
- High-Speed 8-bit SIO: 1ch
- 8-bit UART : 1 ch
- 10-bit successive approximation type AD converter
- Analog input: 8 ch
- Key-on wakeup : 4 ch
- Clock operation
- Single clock mode
- Dual clock mode
- Low power consumption operation
- STOP mode: Oscillation stops. (Battery/Capacitor back-up.)
- SLOW1 mode: Low power consumption operation using low-frequency clock.(High-frequency clock stop.)
- SLOW2 mode: Low power consumption operation using low-frequency clock.(High-frequency clock oscillate.)
- IDLE0 mode: CPU stops, and only the Time-Based-Timer(TBT) on peripherals operate using high frequency clock. Release by falling edge of the source clock which is set by TBTCR
- IDLE1 mode: CPU stops and peripherals operate using high frequency clock. Release by interrupts (CPU restarts)
- IDLE2 mode: CPU stops and peripherals operate using high and low frequency clock. Release by interrupts. (CPU restarts)
- SLEEP0 mode: CPU stops, and only the Time-Based-Timer(TBT) on peripherals operate using low frequency clock. Release by falling edge of the source clock which is set by TBTCR
- SLEEP1 mode: CPU stops, and peripherals operate using low frequency clock. Release by interrupt. (CPU restarts)
- SLEEP2 mode: CPU stops and peripherals operate using high and low frequency clock. Release by interrupt.
- Wide operation voltage:
- 4.5 V to 5.5 V at 16MHz /32.768 kHz
- 2.7 V to 5.5 V at 8 MHz /32.768 kHz
