The ST7LITE49K2 is a member of the ST7 microcontroller family. All ST7 devices are based on a common industry-standard 8-bit core, featuring an enhanced instruction set.The ST7LITE49K2 features Flash memory with byte-by-byte In-Circuit Programming (ICP) and In-Application Programming (IAP) capability.Under software control, the ST7LITE49K2 device can be placed in Wait, Slow, or Halt mode, reducing power consumption when the application is in idle or standby state.The enhanced instruction set and addressing modes of the ST7 offer both power and flexibility to software developers, enabling the design of highly efficient and compact application code. In addition to standard 8-bit data management, all ST7 microcontrollers feature true bit manipulation, 8×8 unsigned multiplication and indirect addressing modes.
Memories 8 Kbytes single voltage extended Flash (XFlash) program memory with Read-out protection In-circuit programming and in-application programming (ICP and IAP) Endurance: 10K write/erase cycles guaranteed Data retention: 20 years at 55 °C 384 bytes RAM 256 bytes data EEPROM with Read-Out Protection. 300K write/erase cycles guaranteed, data retention: 20 years at 55 °C.
Clock, Reset and Supply Management Low voltage supervisor (LVD) for safe power-on/off Clock sources: Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power – low frequency oscillator, crystal/ceramic resonator or external clock Five power saving modes: Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow Internal 32-MHz input clock for Autoreload timer
I/O Ports Up to 24 multifunctional bidirectional I/Os 8 high sink outputs
6 timers Configurable watchdog timer Dual 8-bit Lite timers with prescaler, 1 real time base and 1 input capture Dual 12-bit Autoreload timers with 4 PWM outputs, input capture, output compare, dead-time generation and enhanced one pulse mode functions
Communication interfaces: I²C multimaster interface SPI synchronous serial interface
2 analog comparators Internal voltage reference module
A/D Converter 10 input channels Fixed gain Op-amp
Interrupt management 13 interrupt vectors plus TRAP and RESET
Instruction set 8-bit data manipulation 63 basic instructions with illegal opcode detection 17 main addressing modes 8 x 8 unsigned multiply instructions
Development tools Full HW/SW development package DM (Debug module)
