MCU 8-bit P89 80C51 CISC 64KB Flash 5V 44-Pin PLCC, P89C668HFA/00,512, NXP

The P89C660/662/664/668 device contains a non-volatile 16KB/32KB/64KB Flash program memory that is both parallel programmable and serial In-System and In-Application Programmable. In-System Programming (ISP) allows the user to download new code while the microcontroller sits in the application. In-Application Programming (IAP) means that the microcontroller fetches new program code and reprograms itself while in the system. This allows for remote programming over a modem link. A default serial loader (boot loader) program in ROM allows serial In-System Programming of the Flash memory via the UART without the need for a loader in the Flash code. For In-Application Programming, the user program erases and reprograms the Flash memory by use of standard routines contained in ROM. This device executes one instruction in 6 clock cycles, hence providing twice the speed of a conventional 80C51. An OTP configuration bit gives the user the option to select conventional 12-clock timing.

  • 80C51 Central Processing Unit
  • On-chip Flash program memory with In-System Programming (ISP) and In-Application Programming (IAP) capability
  • Boot ROM contains low level Flash programming routines for downloading via the UART
  • Can be programmed by the end-user application (IAP)
  • Parallel programming with 87C51 compatible hardware interface to programmer
  • Six clocks per machine cycle operation (standard)
  • 12 clocks per machine cycle operation (optional)
  • Speed up to 20 MHz with 6 clock cycles per machine cycle (40 MHz equivalent performance); up to 33 MHz with 12 clocks per machine cycle
  • Fully static operation
  • RAM externally expandable to 64 kbytes
  • Four interrupt priority levels
  • Eight interrupt sources
  • Four 8-bit I/O ports
  • Full-duplex enhanced UART
    • Framing error detection
    • Automatic address recognition
  • Power control modes
    • Clock can be stopped and resumed
    • Idle mode
    • Power-Down mode
  • Programmable clock out
  • Second DPTR register
  • Asynchronous port reset
  • Low EMI (inhibit ALE)
  • I2C serial interface
  • Programmable Counter Array (PCA)
    • PWM
    • Capture/compare
  • Well-suited for IPMI applications

Характеристики

Бренд

Product_dimensions

16.66 x 16.66 x 3.68 mm

Max_power_dissipation

1500 mW

Min_operating_supply_voltage

4.5 V

Max_operating_supply_voltage

5.5 V

Watchdog

1

Supplier_package

PLCC

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/PHGL/PHGLS17878/PHGLS17878-1.pdf?hkey=52A5661711E402568146F3353EA87419

Schedule_b

8542310000

Ram_size

8 KB

Program_memory_type

Flash

Program_memory_size

64 KB

Pin_count

44

Data_bus_width

8 Bit

Operating_temperature

-40 to 85 °C

Operating_supply_voltage

5 V

Number_of_timers

3

Number_of_programmable_i_os

32

Mounting

Surface Mount

Maximum_speed

33 MHz

Тип интерфейса

I2C/UART

Instruction_set_architecture

CISC

Htsn

8542310001

Eccn

EAR99

Device_core

80C51

Max_expanded_memory_size

64 KB

Артикул: P89C668HFA/00,512

Описание

The P89C660/662/664/668 device contains a non-volatile 16KB/32KB/64KB Flash program memory that is both parallel programmable and serial In-System and In-Application Programmable. In-System Programming (ISP) allows the user to download new code while the microcontroller sits in the application. In-Application Programming (IAP) means that the microcontroller fetches new program code and reprograms itself while in the system. This allows for remote programming over a modem link. A default serial loader (boot loader) program in ROM allows serial In-System Programming of the Flash memory via the UART without the need for a loader in the Flash code. For In-Application Programming, the user program erases and reprograms the Flash memory by use of standard routines contained in ROM. This device executes one instruction in 6 clock cycles, hence providing twice the speed of a conventional 80C51. An OTP configuration bit gives the user the option to select conventional 12-clock timing.

  • 80C51 Central Processing Unit
  • On-chip Flash program memory with In-System Programming (ISP) and In-Application Programming (IAP) capability
  • Boot ROM contains low level Flash programming routines for downloading via the UART
  • Can be programmed by the end-user application (IAP)
  • Parallel programming with 87C51 compatible hardware interface to programmer
  • Six clocks per machine cycle operation (standard)
  • 12 clocks per machine cycle operation (optional)
  • Speed up to 20 MHz with 6 clock cycles per machine cycle (40 MHz equivalent performance); up to 33 MHz with 12 clocks per machine cycle
  • Fully static operation
  • RAM externally expandable to 64 kbytes
  • Four interrupt priority levels
  • Eight interrupt sources
  • Four 8-bit I/O ports
  • Full-duplex enhanced UART
    • Framing error detection
    • Automatic address recognition
  • Power control modes
    • Clock can be stopped and resumed
    • Idle mode
    • Power-Down mode
  • Programmable clock out
  • Second DPTR register
  • Asynchronous port reset
  • Low EMI (inhibit ALE)
  • I2C serial interface
  • Programmable Counter Array (PCA)
    • PWM
    • Capture/compare
  • Well-suited for IPMI applications

Детали

Бренд

Product_dimensions

16.66 x 16.66 x 3.68 mm

Max_power_dissipation

1500 mW

Min_operating_supply_voltage

4.5 V

Max_operating_supply_voltage

5.5 V

Watchdog

1

Supplier_package

PLCC

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/PHGL/PHGLS17878/PHGLS17878-1.pdf?hkey=52A5661711E402568146F3353EA87419

Schedule_b

8542310000

Ram_size

8 KB

Program_memory_type

Flash

Program_memory_size

64 KB

Pin_count

44

Data_bus_width

8 Bit

Operating_temperature

-40 to 85 °C

Operating_supply_voltage

5 V

Number_of_timers

3

Number_of_programmable_i_os

32

Mounting

Surface Mount

Maximum_speed

33 MHz

Тип интерфейса

I2C/UART

Instruction_set_architecture

CISC

Htsn

8542310001

Eccn

EAR99

Device_core

80C51

Max_expanded_memory_size

64 KB