Описание
The MB95F564K is a series of general-purpose, single-chip microcontrollers. In addition to a compact instruction set, the microcontrollers of this series contain a variety of peripheral resources
- F2MC-8FX CPU core Instruction set optimized for controllers
- Multiplication and division instructions
- 16-bit arithmetic operations
- Bit test branch instructions
- Bit manipulation instructions, etc. Note: F2MC is the abbreviation of FUJITSU Flexible Microcontroller.
- Clock (The main oscillation clock and the suboscillation clock are only available on MB95F564K
- Selectable main clock source
- Main oscillation clock (up to 16.25 MHz, maximum machine clock frequency: 8.125 MHz)
- External clock (up to 32.5 MHz, maximum machine clock frequency: 16.25 MHz)
- Main CR clock (4 MHz ± 2%)
- The main CR clock frequency becomes 8 MHz when the PLL multiplication rate is 2.
- The main CR clock frequency becomes 10 MHz when the PLL multiplication rate is 2.5.
- The main CR clock frequency becomes 12 MHz when the PLL multiplication rate is 3.
- The main CR clock frequency becomes 16 MHz when the PLL multiplication rate is 4.
- Selectable subclock source
- Suboscillation clock (32.768 kHz)
- External clock (32.768 kHz)
- Sub-CR clock (Typ: 100 kHz, Min: 50 kHz, Max: 150 kHz)
- Timer
- Time-base timer × 1 channel
- Watch prescaler × 1 channel
- LIN-UART (only available on MB95F564K
- Full duplex double buffer
- Capable of clock synchronous serial data transfer and clock asynchronous serial data transfer
- External interrupt
- Interrupt by edge detection (rising edge, falling edge, and both edges can be selected)
- Can be used to wake up the device from different low power consumption (standby) modes
- 8/10-bit A/D converter 8-bit or 10-bit resolution can be selected.
- Low power consumption (standby) modes There are four standby modes as follows:
- Stop mode
- Sleep mode
- Watch mode
- Time-base timer mode In standby mode, the device can be made to enter either normal standby mode or deep standby mode.
- I/O port
- MB95F564K (maximum no. of I/O ports: 17)
- General-purpose I/O ports (CMOS I/O) : 15
- General-purpose I/O ports (N-ch open drain) : 2 On-chip debug
- 1-wire serial control
- Serial writing supported (asynchronous mode)
- Hardware/software watchdog timer
- Built-in hardware watchdog timer
- Built-in software watchdog timer
- Power-on reset A power-on reset is generated when the power is switched on.
- Low-voltage detection reset circuit only available on MB95F564K Built-in low-voltage detector
- Clock supervisor counter Built-in clock supervisor counter function
- Dual operation Flash memory The program/erase operation and the read operation can be executed in different banks (upper bank/lower bank) simultaneously.
- Flash memory security function Protects the content of the Flash memory
