Описание
The enCoRe V LV family of devices are designed to replace multiple traditional low voltage microcontroller system components with one, low cost single-chip programmable component. Communication peripherals (I2C/SPI), a fast CPU, Flash program memory, SRAM data memory, and configurable IO are included in a range of convenient pinouts. The architecture for this device family, as illustrated (enCoRe V LV – Block Diagram), is comprised of two main areas: the CPU core and the system resources. Depending on the enCoRe V LV package, up to 36 general purpose IO (GPIO) are also included. Enhancements over the Cypress’ legacy low voltage microcontrollers include faster CPU at lower voltage operation, lower current consumption, twice the RAM and Flash, hot-swapable IOs, I2C hardware address recognition, new very low current sleep mode, and new package optionsThe enCoRe V LV Core is a powerful engine that supports a rich instruction set. It encompasses SRAM for data storage, an interrupt controller, sleep and watchdog timers, and IMO (internal main oscillator) and ILO (internal low speed oscillator). The CPU core, called the M8C, is a powerful processor with speeds up to 24 MHz. The M8C is a four-MIPS, 8-bit Harvard architecture microprocessor.System Resources provide additional capability, such as a configurable I2C slave/SPI master-slave communication interface and various system resets supported by the M8C.
- Powerful Harvard Architecture Processor
- M8C Processor speeds running up to 24 MHz
- Low power at high processing speeds
- Interrupt controller
- 1.71V to 3.6V operating voltage
- Temperature range: 0°C to 70°C
- Flexible On-Chip Memory
- Up to 32K Flash program storage 50,000 Erase/write cycles
- Up to 2048 bytes SRAM data storage
- Flexible protection modes
- In-System Serial Programming (ISSP)
- Complete Development Tools
- Free development tool (PSoC Designer™)
- Full-featured, in-circuit emulator and programmer
- Full-speed emulation
- Complex breakpoint structure
- 128K Trace memory
- Precision, Programmable Clocking
- Crystal-less oscillator with support for an external crystal or resonator
- Internal ±5.0% 6/12/24 MHz main oscillator
- Internal Low speed oscillator at 32 kHz for watchdog and sleep.The frequency range is 19-50 kHz with a 32 kHz typical value.
- Programmable Pin Configurations
- 25 mA Sink current on all GPIO
- Pull up, high Z, open drain, CMOS drive modes on all GPIO
- Configurable inputs on all GPIO
- Low-dropout voltage regulator for Port1 pins. Programmable to output 3.0, 2.5 or 1.8V at the I/O pins.
- Selectable, regulated digital IO on Port 1
- Configurable Input Threshold for Port 1
- 3.0V, 20 mA Total Port 1 source current
- Hot-Swappable
- 5 mA Strong drive mode on Ports 0 and 1
- Additional System Resources
- Configurable communication speeds
- I2C™ Slave
- Selectable to 50 kHz, 100 kHz, or 400 kHz
- Implementation requires no clock stretching
- Implementation during sleep modes with less than 100 mA
- Hardware address detection
- SPI master and SPI slave
- Configurable between 46.9 kHz-3 MHz
- Three 16-bit timers
- 10-bit ADC for monitoring battery voltage or other signals
- Watchdog and sleep timers
- Integrated supervisory circuit
