Описание
The enCoRe III low voltage (enCoRe III LV) CY7C603xx device is based on the flexible PSoC architecture. This supports a simple set of peripherals that can be configured to match the needs of each application. Additionally, a fast CPU, flash program memory, SRAM data memory, and configurable IO are included in a range of convenient pinouts.This architecture enables the user to create customized peripheral configurations that match the requirements of each individual application. A fast CPU, flash program memory, SRAM data memory, and configurable IO are included in both 28-pin SSOP and 32-pin QFN packages.The enCoRe III LV architecture consists of four main areas: the enCoRe III LV Core, the system resources, digital system, and analog system. Configurable global bus resources allow combining all the device resources into a complete custom system. Each enCoRe III LV device supports a limited set of digital and analog peripherals. Depending on the package, up to 28 general purpose I/Os (GPIOs) are also included. The GPIOs provide access to the global digital and analog interconnects.The enCoRe III LV core is a powerful engine that supports a rich feature set. It encompasses SRAM for data storage, an interrupt controller, sleep and watchdog timers, and IMO (internal main oscillator) and ILO (internal low-speed oscillator).The CPU core, called the M8C, is a powerful processor with speeds up to 12 MHz. The M8C is a four MIPS 8-bit Harvard -architecture microprocessor. The core includes a CPU, memory, clocks, and configurable GPIO.System resources provide additional capability, such as digital clocks to increase flexibility, I2C functionality for implementing an I2C master, slave, multi-master, an internal voltage reference that provides an absolute value of 1.3 V to a number of subsystems, a switch mode pump (SMP) that generates normal operating voltages off a single battery cell, and various system resets supported by the M8C.
- Powerful Harvard-architecture processor
- M8C processor speeds to 12 MHz
- Low power at high speed
- 2.4 V to 3.6 V operating voltage
- Operating voltages down to 1.0 V using on-chip switch mode pump (SMP)
- Commercial temperature range: 0 °C to +70 °C
- Configurable peripherals
- 8-bit timers, counters, and PWM
- Full duplex master or slave SPI
- 10-bit ADC
- 8-bit successive approximation ADC
- Comparator
- Flexible on-chip memory
- 8K flash program storage 50,000 erase/write cycles
- 512 bytes SRAM data storage
- In-System serial programming (ISSP)
- Partial flash updates
- Flexible protection modes
- EEPROM emulation in flash
- Complete development tools
- Free development software (PSoC® Designer™)
- Full-featured, In-circuit emulator and programmer
- Complex breakpoint structure
- 128K trace memory
- Precision, programmable clocking
- Internal ±2.5% 24 and 48 MHz oscillator
- Internal oscillator for watchdog and sleep
- Programmable pin configurations
- 10 mA drive on all general purpose I/O (GPIO)
- Pull-up, pull-down, high-Z, strong, or open drain drive modes on all GPIO
- Up to 8 analog inputs on GPIO
- Configurable interrupt on all GPIO
- Versatile analog mux
- Common internal analog bus
- Simultaneous connection of IO combinations
- Additional system resources
- I 2C master, slave, and Multimaster to 400 kHz
- Watchdog and sleep timers
- User-configurable low-voltage detection
- Integrated supervisory circuit
- On-chip precision voltage reference
