Описание
enCoRe III is based on the flexible PSoC architecture and is a full-featured, full-speed (12 Mbps) USB part. Configurable analog, digital, and interconnect circuitry enable a high level of integration in a host of consumer, and communication applications. This architecture allows the user to create customized peripheral configurations that match the requirements of each individual application. Additionally, a fast CPU, Flash program memory, SRAM data memory, and configurable IO are included in both 28-pin SSOP and 56-pin QFN packages. The enCoRe III architecture, as illustrated in Figure 1-1, is comprised of four main areas: enCoRe III Core, Digital System, Analog System, and System Resources including a full-speed USB port. Configurable global busing allows all the device resources to be combined into a complete custom system. The enCoRe III CY7C64215 can have up to seven IO ports that connect to the global digital and analog interconnects, providing access to 4 digital blocks and 1 analog block.
- Powerful Harvard Architecture Processor
- M8C Processor Speeds to 24 MHz
- Two 8×8 Multiply, 32-bit Accumulate
- 3.0 to 5.25V Operating Voltage
- USB Temperature Range: 0°C to +70°C
- Advanced Peripherals (enCoRe™ III Blocks)
- Analog enCoRe III Block Provides:
- Up to 14-bit ADCs
- 4 Digital enCoRe III Blocks Provide:
- 8-bit PWMs
- Full-Duplex UART
- Multiple SPI Masters or Slaves
- Connectable to all GPIO Pins
- Complex Peripherals by Combining Blocks
- Full-Speed USB (12 Mbps)
- Four Unidirectional Endpoints
- One Bidirectional Control Endpoint
- USB 2.0 Compliant
- Dedicated 256 Byte Buffer
- No External Crystal Required
- Flexible On-Chip Memory
- 16K Flash Program Storage 50,000 Erase/Write Cycles
- 1K SRAM Data Storage
