Описание
The TERIDIAN Semiconductor Corporation 73S1121F-CGVR/F1 is a CMOS single chip dual ISO-7816 smart-card terminal micro-controller that implements all the functions required to build a low-cost dual smart-card terminal with a USB interface, suitable for various applications including EMVCo compliant payment terminals. Its enhanced set of features supports several configurations allowing low component count and a fast design cycle. Based on an 80C52 core, it incorporates communication and man-machine interfaces. The TERIDIAN 73S1121F-CGVR/F1 device is applicable to either portable or host connected applications. Embedded Flash memory makes the TERIDIAN 73S1121F-CGVR/F1 a complete system on-chip suitable for both development and production phases This data-sheet presents the package and pin description, as well as the electrical features that are unique to the TERIDIAN 73S1121F-CGVR/F1. It also presents a brief description of the architecture and of its embedded functions.
- 80C52 core:
- 12 clock-cycle / instruction
- CPU clocked up to 24MHz (with a 12MHz crystal)
- 16-bit PC (64kB program linear memory address space)
- Memory:
- 64kB internal Flash (Program Memory)
- 128 Bytes Flash Info Memory Block
- Flash memory guaranteed for 10,000 erase-write cycles
- 1kB IRAM (internal RAM for registers) + 4kB internal XRAM (User Data Memory)
- Interface for external program / data memory
- Boot-ROM loader program allows both In-System Programming and In-Application-Programming of the embedded flash (ISP and IAP modes)
- ISP programming mode and external memory interface can be permanently disabled by protection fuses
- Oscillators:
- Single low-cost 12MHz crystal
- Optional low-cost 32kHz crystal (with internal counter for RTC support)
- An Internal PLL provides all the necessary clocks to each block of the system
- Interrupts:
- Standard 80C52 2-priority level structure
- 8 different sources of interrupt
