Description
The AVR XMEGA is a family of low power, high performance, and peripheral rich 8/16-bit microcontrollers based on the AVR enhanced RISC architecture. By executing instructions in a single clock cycle, the AVR XMEGA device achieves throughputs CPU approaching one million instructions per second (MIPS) per megahertz, allowing the system designer to optimize power consumption versus processing speed. The AVR CPU combines a rich instruction set with 32 general purpose working registers. All 32 registers are directly connected to the arithmetic logic unit (ALU), allowing two independent registers to be accessed in a single instruction, executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs many times faster than conventional single-accumulator or CISC based microcontrollers. The AVR XMEGA A3U devices provide the following features: in-system programmable flash with read-while write capabilities; internal EEPROM and SRAM; four-channel DMA controller, eight-channel event system and programmable multilevel interrupt controller, 50 general purpose I/O lines, 16-bit real-time counter (RTC); seven flexible, 16-bit timer/counters with compare and PWM channels; seven USARTs; two two-wire serial interfaces (TWIs); one full speed USB 2.0 interface; three serial peripheral interfaces (SPIs); AES and DES cryptographic engine; two 16-channel, 12-bit ADCs with programmable gain; one 2-channel 12-bit DAC; four analog comparators (ACs) with window mode; programmable watchdog timer with separate internal oscillator; accurate internal oscillators with PLL and presale; and programmable brown-out detection. All AVR XMEGA devices are supported with a full suite of program and system development tools, including C compilers, macro assemblers, program debugger/simulators, programmers, and evaluation kits.
- High-performance, low-power ® AVR® XMEGA® 8/16-bit Microcontroller
- Nonvolatile program and data memories
- 384KBytes of in-system self-programmable flash
- 8KBytes boot section
- 4KBytes EEPROM
- 32KBytes internal SRAM
- Peripheral features
- Two -channel DMA controller
- Four-channel event system
- Five 16-bit timer/counters
- Four timer/counters with four output compare or input capture channels
- One timer/counter with two output compare or input capture channels
- High resolution extension on two timer/counters
- Advanced waveform extension (Awe) on one timer/counter
- One USB device interface
- USB 2.0 full speed (12Mbps) and low speed (1.5Mbps) device compliant
- 32 Endpoints with full configuration flexibility
- Three USARTs with IrDA support for one USART
- Two two-wire interfaces with dual address match (I²C and SMBus compatible)
- Two serial peripheral interfaces (SPIs)
- AES crypto engine
- CRC-16 (CRC-CCITT) and CRC-32 (IEEE®802.3) generator
- 16-bit real time counter (RTC) with separate oscillator
- One sixteen-channel, 12-bit, 300ksps Analog to Digital Converter
- Two Analog Comparators with window compare function, and current sources
- External interrupts on all general purpose I/O pins
- Programmable watchdog timer with separate on-chip ultra low power oscillator
- QTouch® library support
- Capacitive touch buttons, sliders and wheels
- Special microcontroller features
- Power-on reset and programmable brown-out detection
- Internal and external clock options with PLL and presale
- Programmable multilevel interrupt controller
- Five sleep modes
- Programming and debug interface
- PDI (program and debug interface)
- I/O and packages
- 50 programmable I/O pins
- 64-lead TQFP
- 64-pad QFN
- Operating voltage
- 1.6 – 3.6V
- Operating frequency
- 0 – 12MHz from 1.6V
- 0 – 32MHz from 2.7V
