Description
The V850ES/Hx2 is a 32-bit single-chip microcontroller that includes the V850ES CPU core and peripheral functions such as ROM/RAM, a timer/counter, serial interfaces, and an A/D converter.
- Operating Voltage: 3.5 to 5.5 V
- Max. frequency: 20 MHz
- ROM capacities: 64 KB to 256 KB flash memory
- RAM capacities: 6 KB to 12 KB
- Package: 64/80/100/144-pin plastic LQFP package
- Minimum instruction execution time: 50 ns (operating with main clock (fXX) of 20 MHz)
- General-purpose registers: 32 bits x 32 registers
- CPU features:
- Signed multiplication (16 x 16 -> 32): 1 to 2 clocks
- Signed multiplication (32 x 32 -> 64): 1 to 5 clocks
- Saturated operations (overflow and underflow detection functions included)
- 32-bit shift instruction: 1 clock
- Bit manipulation instructions
- Load/store instructions with long/short format
- Memory space: 64 MB of linear address space (for programs and data)
- Interrupts and exceptions:
- Non-maskable interrupts: 2 sources
- Maskable interrupts: 39 to 64 sources
- Software exceptions: 32 to 52 sources
- Exception trap: 2 sources
- I/O ports: 51
- Timer function:
- 16-bit interval timer M (TMM): 1 channel
- 16-bit timer/event counter P (TMP): 4 channels
- 16-bit timer/event counter Q (TMQ): 1 to 3 channel
- Watch timer: 1 channel
- Watchdog timer 2: 1 channel
- Serial interface:
- Asynchronous serial interface A (UARTA)
- 3-wire variable-length serial interface B (CSIB)
- UARTA (supporting LIN): 2 to 4 channels
- CSIB: 2 to 3 channels
- A/D converter: 10-bit resolution: 10 to 16 channels
- DCU (Debug control unit): JTAG interface
- Clock generator:
- During main clock or subclock operation
- 7-level CPU clock (fXX, fXX/2, fXX/4, fXX/8, fXX/16, fXX/32, fXT)
- Clock-through mode/PLL mode selectable
- Internal oscillation clock: 200 kHz (TYP.)
- Power-save functions: HALT/IDLE1/IDLE2/STOP/subclock/sub-IDLE mode
