Описание
The STM32H743xI devices are based on the high-performance ARM Cortex-M7 32-bit RISC core operating at up to 400 MHz frequency. The Cortex-M7 core features a floating point unit (FPU) which supports ARM double-precision (IEEE 754 compliant) and singleprecision data-processing instructions and data types. The STM32H743xI support a full set of DSP instructions and a memory protection unit (MPU) which enhances application security.The STM32H743xI devices incorporate high-speed embedded memories with a dual-bank Flash memory up to 2 Mbytes, around 1 Mbytes of RAM (including 192 Kbytes of TCM RAM, 864 Kbytes of user SRAM and 4 Kbytes of backup SRAM), as well as an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses, a 32-bit multi-AHB bus matrix and a multi-layer AXI interconnect supporting internal and external memories access.All the devices offer three ADCs, two DACs, two ultra-low power comparators, a low-power RTC, a high-resolution timer, 12 general-purpose 16-bit timers, two PWM timers for motor control, five low-power timers, a true random number generator (RNG). The devices support four digital filters for external sigma delta modulators (DFSDM). They also feature standard and advanced communication interfaces.
Core
- 32bit ARM Cortex-M7 core with double precision FPU and L1 cache: 16 KB of data and 16 KB of instruction cache allowing to fill one cache line in a single access from the 256- bit embedded Flash memory; frequency up to 400MHz, MPU, 856DMIPS/2.14DMIPS/MHz (Dhrystone 2.1), and DSP instructions
Memories
- Up to 2MB of Flash memory with read while write support
- ~1MB of RAM: 192KB of TCM RAM (inc. 64KB of ITCM RAM + 128KB of DTCM RAM for time critical routines), 864KB of user SRAM, and 4KB of SRAM in Backup domain
- Dual mode Quad-SPI memory interface
- Flexible external memory controller with up to 32bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
- CRC calculation unit
Security
- ROP, PC-ROP, active tamper
Reset and power management
- 3 separate power domains which can be independently set in low-power mode to maximize power efficiency (clock gated or switched off)
- 1.62 to 3.6V application supply and I/Os
- POR, PDR, PVD and BOR
- Dedicated USB power embedding a 3.3V internal regulator to supply the internal PHYs
- Embedded regulator (LDO) with configurable scalable output to supply the digital circuitry
- Voltage scaling in Run and Stop mode
- Backup regulator (~0.9V)
- Voltage reference for analog peripheral and VREF+
Low-power modes: Sleep, Stop and Standby
Clock management
- Internal oscillators: 64MHz HSI oscillator, 48MHz RC oscillator, 4MHz CSI oscillator, 40kHz LSI oscillator
- External oscillators: 1-48MHz HSE oscillator, 32.768kHz LSE oscillator
- 3x PLLs (1 for the system clock, 2 for kernel clocks) with fractional mode
General-purpose input/outputs
- Up to 168 I/O ports with interrupt capability
Interconnect matrix
- 3 bus matrices (1 AXI and 2 AHB)
- Bridges (5 * AHB2APB, 2 * AXI2AHB)
4 DMA controllers to unload the CPU
- 1x high-speed general-purpose master direct memory access controller (MDMA)
- 2x dual-port DMAs with FIFO and request router capabilities for optimal peripheral management
- 1x basic DMA with request router capabilities
11 analog peripherals
- 3x ADCs with 16-bit max. resolution (14 bits 2.7 MSPS, 16 bits 168 kSPS)
- 1x temperature sensor
- 2x 12-bit D/A converters (1 MHz)
- 2x ultra-low-power comparators
- 2x operational amplifiers (8MHz bandwidth)
- 1x digital filters for sigma delta modulator (DFSDM) with 8 channels/4 filters
Graphics
- LCD-TFT controller supporting up to XGA Resolution
- Chrom-ART Accelerator graphical hardware accelerator (DMA2D) for enhanced GUI to reduce CPU load
- Hardware JPEG Codec
Up to 22 timers and watchdogs
- 1x high-resolution timer (2.5 ns max resolution)
- 2x 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
- 2x 16-bit advanced motor control timers
- 10x 16-bit general-purpose timers
- 5x 16-bit low-power timers
- 2x watchdogs (independent and window)
- 1x SysTick timer
- RTC with sub-second accuracy and hardware calendar
Debug mode
- SWD & JTAG interfaces
- 4Kbyte Embedded Trace Buffer
2x true random number generators (3 oscillators each)
96-bit unique ID
All packages are ECOPACK2 compliant
