MCU 32-Bit SPC563M60x e200z335 RISC 1MB Flash 1.2V/3.3V/5V 176-Pin LQFP T/R, SPC563M60L7CPAR, STMicroelectronics

These 32-bit automotive microcontrollers are a family of system-on-chip (SoC) devices that contain many new features coupled with high performance 90 nm CMOS technology to provide substantial reduction of cost per feature and significant performance improvement. The advanced and cost-efficient host processor core of this automotive controller family is built on Power Architecture technology. This family contains enhancements that improve the architecture’s fit in embedded applications, includes additional instruction support for digital signal processing (DSP), integrates technologies—such as an enhanced time processor unit, enhanced queued analog-to-digital converter, Controller Area Network, and an enhanced modular input-output system—that are important for today’s lower-end powertrain applications. The device has a single level of memory hierarchy consisting of up to 94 KB on-chip SRAM and up to 1.5 MB of internal flash memory. The device also has an external bus interface (EBI) for ‘calibration’.

  • Single issue, 32-bit Power Architecture® Book E compliant e200z335 CPU core complex o Includes variable length encoding (VLE) enhancements for code size reduction
  • 32-channel direct memory access controller (DMA)
  • Interrupt controller (INTC) capable of handling 364 selectable-priority interrupt sources: 191 peripheral interrupt sources, 8 software interrupts and 165 reserved interrupts.
  • Frequency-modulated phase-locked loop (FMPLL)
  • Calibration external bus interface (EBI)(a)
  • System integration unit (SIU)
  • Up to 1.5 Mbyte on-chip Flash with Flash controller o Fetch Accelerator for single cycle Flash access @80 MHz
  • Up to 94 Kbyte on-chip static RAM (including up to 32 Kbyte standby RAM)
  • Boot assist module (BAM)
  • 32-channel second-generation enhanced time processor unit (eTPU) o 32 standard eTPU channels o Architectural enhancements to improve code efficiency and added flexibility
  • 16-channels enhanced modular input-output system (eMIOS)
  • Enhanced queued analog-to-digital converter (eQADC)
  • Decimation filter (part of eQADC)
  • Silicon die temperature sensor
  • 2 deserial serial peripheral interface (DSPI) modules (compatible with Microsecond Bus)
  • 2 enhanced serial communication interface (eSCI) modules compatible with LIN
  • 2 controller area network (FlexCAN) modules that support CAN 2.0B
  • Nexus port controller (NPC) per IEEE-ISTO 5001-2003 standard
  • IEEE 1149.1 (JTAG) support
  • Nexus interface
  • On-chip voltage regulator controller that provides 1.2 V and 3.3 V internal supplies from a 5 V external source
  • Designed for LQFP100, LQFP144, LQFP176 and LBGA208.

Характеристики

Program_memory_size

1 MB

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/SGST/SGSTS50074/SGSTS50074-1.pdf?hkey=52A5661711E402568146F3353EA87419

Number_of_timers

6

On_chip_adc

2(34-chx12-bit)

Operating_supply_voltage

1.2, 3.3, 5 V

Operating_temperature

-40 to 125 °C

Pin_count

176

Product_dimensions

24 x 24 x 1.4

Program_memory_type

Flash

Mounting

Surface Mount

Ram_size

64 KB

Schedule_b

8542310000

Screening_level

Automotive

Special_features

CAN Controller

Number_of_programmable_i_os

80

Watchdog

1

Supplier_package

LQFP

Msl_level

3

Min_operating_supply_voltage

1.14, 3, 4.75 V

Бренд

Data_bus_width

32 Bit

Device_core

e200z335

Eccn

3A991.A.2

Htsn

8542310001

Max_speed

80 MHz

Instruction_set_architecture

RISC

Тип интерфейса

CAN/SCI/SPI

Lead_finish

Tin

Max_operating_supply_voltage

1.32, 3.6, 5.25 V

Max_processing_temp

260 °C

Артикул: SPC563M60L7CPAR

Описание

These 32-bit automotive microcontrollers are a family of system-on-chip (SoC) devices that contain many new features coupled with high performance 90 nm CMOS technology to provide substantial reduction of cost per feature and significant performance improvement. The advanced and cost-efficient host processor core of this automotive controller family is built on Power Architecture technology. This family contains enhancements that improve the architecture’s fit in embedded applications, includes additional instruction support for digital signal processing (DSP), integrates technologies—such as an enhanced time processor unit, enhanced queued analog-to-digital converter, Controller Area Network, and an enhanced modular input-output system—that are important for today’s lower-end powertrain applications. The device has a single level of memory hierarchy consisting of up to 94 KB on-chip SRAM and up to 1.5 MB of internal flash memory. The device also has an external bus interface (EBI) for ‘calibration’.

  • Single issue, 32-bit Power Architecture® Book E compliant e200z335 CPU core complex o Includes variable length encoding (VLE) enhancements for code size reduction
  • 32-channel direct memory access controller (DMA)
  • Interrupt controller (INTC) capable of handling 364 selectable-priority interrupt sources: 191 peripheral interrupt sources, 8 software interrupts and 165 reserved interrupts.
  • Frequency-modulated phase-locked loop (FMPLL)
  • Calibration external bus interface (EBI)(a)
  • System integration unit (SIU)
  • Up to 1.5 Mbyte on-chip Flash with Flash controller o Fetch Accelerator for single cycle Flash access @80 MHz
  • Up to 94 Kbyte on-chip static RAM (including up to 32 Kbyte standby RAM)
  • Boot assist module (BAM)
  • 32-channel second-generation enhanced time processor unit (eTPU) o 32 standard eTPU channels o Architectural enhancements to improve code efficiency and added flexibility
  • 16-channels enhanced modular input-output system (eMIOS)
  • Enhanced queued analog-to-digital converter (eQADC)
  • Decimation filter (part of eQADC)
  • Silicon die temperature sensor
  • 2 deserial serial peripheral interface (DSPI) modules (compatible with Microsecond Bus)
  • 2 enhanced serial communication interface (eSCI) modules compatible with LIN
  • 2 controller area network (FlexCAN) modules that support CAN 2.0B
  • Nexus port controller (NPC) per IEEE-ISTO 5001-2003 standard
  • IEEE 1149.1 (JTAG) support
  • Nexus interface
  • On-chip voltage regulator controller that provides 1.2 V and 3.3 V internal supplies from a 5 V external source
  • Designed for LQFP100, LQFP144, LQFP176 and LBGA208.

Детали

Program_memory_size

1 MB

Specifications

https://4donline.ihs.com/images/VipMasterIC/IC/SGST/SGSTS50074/SGSTS50074-1.pdf?hkey=52A5661711E402568146F3353EA87419

Number_of_timers

6

On_chip_adc

2(34-chx12-bit)

Operating_supply_voltage

1.2, 3.3, 5 V

Operating_temperature

-40 to 125 °C

Pin_count

176

Product_dimensions

24 x 24 x 1.4

Program_memory_type

Flash

Mounting

Surface Mount

Ram_size

64 KB

Schedule_b

8542310000

Screening_level

Automotive

Special_features

CAN Controller

Number_of_programmable_i_os

80

Watchdog

1

Supplier_package

LQFP

Msl_level

3

Min_operating_supply_voltage

1.14, 3, 4.75 V

Бренд

Data_bus_width

32 Bit

Device_core

e200z335

Eccn

3A991.A.2

Htsn

8542310001

Max_speed

80 MHz

Instruction_set_architecture

RISC

Тип интерфейса

CAN/SCI/SPI

Lead_finish

Tin

Max_operating_supply_voltage

1.32, 3.6, 5.25 V

Max_processing_temp

260 °C