Описание
The SAM E70 devices are members of a family of Flash microcontrollers based on the high performance 32-bit ARM Cortex-M7 processor with Floating Point Unit (FPU). These devices operate at up to 300 MHz and feature up to 2048 Kbytes of Flash and up to 384 Kbytes of multi-port SRAM. The on-chip SRAM can be configured as Tightly Coupled Memory (TCM) or system memory. A multi-port access to the SRAM guarantees a minimum access latency. The SAM E70 devices have three software-selectable low-power modes: Sleep, Wait and Backup. In Sleep mode, the processor is stopped while all other functions can be kept running. In Wait mode, all clocks and functions are stopped but some peripherals can be configured to wake up the system based on predefined conditions. This feature, called SleepWalking, performs a partial asynchronous wake-up, thus allowing the processor to wake up only when needed. In Backup mode, RTT, RTC and wake-up logic are running. Optionally a 1-Kbyte low-power SRAM can be retained. To optimize power consumption, the clock system has been designed to support different clock frequencies for selected peripherals. Moreover, the processor and bus clock frequency can be modified without affecting processing on, for example, the USB, U(S)ART, AFE and Timer Counter. The SAM E70 devices also feature an event system that allows peripherals to receive, react to and send events in Active and Sleep modes without processor intervention. The SAM E70 devices are high-performance general-purpose microcontrollers with a rich set of connectivity peripherals and large memory integration. This enables the SAM E70 to sustain a wide range of applications including consumer, industrial control, and PC peripherals.
- Core
- ARM Cortex-M7 running at up to 300 MHz(1)
- 16 Kbytes of I Cache and 16 Kbytes of Cache with Error Code Correction (ECC) ?
- Simple- and double-precision HW Floating Point Unit (FPU)
- Memory Protection Unit (MPU) with 16 zones
- DSP Instructions, Thumb®-2 Instruction Set
- Embedded Trace Module (ETM) with instruction trace stream, including Trace Port Interface Unit (TPIU)
- Memories
- Up to 2048 Kbytes embedded Flash with unique identifier and user signature for user-defined data
- Up to 384 Kbytes embedded Multi-port SRAM
- Tightly Coupled Memory (TCM) interface with four configurations (disabled, 2 x 32 Kbytes, 2 x 64 Kbytes, 2 x 128 Kbytes)
- 16 Kbytes ROM with embedded Boot Loader routines (UART0, USB) and IAP routines
- 16-bit Static Memory Controller (SMC) with support for SRAM, PSRAM, LCD module, NOR and NAND Flash with on-the-fly scrambling
- 16-bit SDRAM Controller (SDRAMC) interfacing up to 256 MB and with on-the-fly scrambling
- System
- Embedded voltage regulator for single-supply operation
- ? Power-on-Reset (POR), Brown-out Detector (BOD) and Dual Watchdog for safe operation ?
- Quartz or ceramic resonator oscillators: 3 to 20 MHz main oscillator with failure detection, 12 MHz or 16 MHz needed for USB operations. Optional low-power 32.768 kHz for RTC or device clock
- ? RTC with Gregorian calendar mode, waveform generation in low-power modes
- RTC counter calibration circuitry compensates for 32.768 kHz crystal frequency variations ?
- 32-bit low-power Real-time Timer (RTT) ?
- High-precision 4/8/12 MHz internal RC oscillator with 4 MHz default frequency for device startup. In-application trimming access for frequency adjustment. 8/12 MHz are factory-trimmed. ?
- 32.768 kHz crystal oscillator or embedded 32 kHz (typical) RC oscillator as source of low-power mode device clock (SLCK) ?
- One 500 MHz PLL for system clock, one 480 MHz PLL for USB high-speed operations ? Temperature Sensor ?
- One dual-port 24-channel central DMA Controller (XDMAC)
- Low-Power Features ?
- Low-power Sleep, Wait and Backup modes, with typical power consumption down to 1.1 µA in Backup mode with RTC, RTT and wake-up logic enabled ?
- Ultra-low-power RTC and RTT
- 1 Kbyte of backup RAM (BRAM) with dedicated regulator
